• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.491-492
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• 2006

The MMIC (Microwave Monolithic Integrated Circuit) self oscillating double conversion mixer was designed and fabricated for the V-band transmitter applications. The MMIC self oscillating double conversion mixer which dose not need external local oscillator was designed using GaAs PHEMT technology. The first self oscillating mixer use PHEMT technology. The first self oscillating mixer use PHEMT for $f_{LO}$ signal generation and $f_{IF}$ signal is applied at gate port and $f_{RF1}$ signal is generated at a drain port of first stage. The second gate mixer use PHEMT for $f_{LO}$ signal and $f_{RF1}$ signal is applied at gate port and $f_{RF2}$ signal is output at a drain port of second stage.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2002.11a
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• pp.77-81
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• 2002

This paper demonstrates a CMOS downconversion mixer for 2.4GHz ISM band applications. The mixer, implemented in a 0.18um CMOS process, is based on the CMOS Gilbert Cell mixer, With a 2.5GHz local oscillator and a 2.45GHz RF input, the measurement results exhibit power conversion gam of -6dB, IIP3 of -6dBm, input $P_{-1dB}$ of -15 dBm, and power dissipation in mixer core of 2.7 mW with 0㏈m LO power and 1.8V supply voltage.

• JSTS:Journal of Semiconductor Technology and Science
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• v.4 no.1
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• pp.74-81
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• 2004

We propose a novel scheme to transmit high center frequency RF signals using electroabsorption devices (EADs) as frequency converters at the transmitter and the receiver. In this approach frequency heterodyning is employed for obtaining high center frequency. With the EAD as a detector/mixer at the receiver we demonstrated a smaller conversion loss than that of the conventional modulator/mixer. With EAD as a modulator/mixer at the transmitter and with two heterodyned lasers to generate an optical local oscillator (LO), we demonstrated a large reduction (${\sim}23dB$) in conversion loss, and the transmission is not limited by the optical saturation of the EAD. This transmission scheme has optical single-side-band transmission feature which greatly relieves the fiber dispersion effect.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2003.11a
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• pp.91-95
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• 2003

In this work, we have designed Gilbert cell downconversion mixer using 0.25um Anam CMOS process, we also have analyzed Conversion gain and IIP3 using Taylor series in our own unique way. Especially, bulk terminal is used as LO( Local Oscillator) input for reduction of power consumption and supply voltage. Supply voltage used in this design is lower than 1.8V and core current is less than 500uA. The simulation experiments showed that the conversion gain, IIP3, and power consumption were -1dB, 4.46dBm, and 0.8mW, respectively.

• Proceedings of the IEEK Conference
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• 2003.11c
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• pp.391-395
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• 2003

In this work, we have designed Gilbert cell downconversion mixer using 0.25um Anam CMOS process, we also have analyzed Conversion gain and IIP3 using Taylor series in our own unique way. Especially, bulk terminal is used as LO( Local Oscillator) input for reduction of power consumption and supply voltage. Supply voltage used in this design is lower than 1.8V and core current is less than 500uA. The simulation experiments showed that the conversion gain, IIP3, and power consumption were -1 dB, 4.46dBm, and 0.8mW, respectively.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.30A no.11
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• pp.58-65
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• 1993

The Ku-band GaAs MESFET mixer is designed and implemented using the LINMIC+, the microwave CAD simulator. The RF and IF is 14.0GHz and 1.0GHz, respectively. P$_{LO}$ is 0dBm, it can be obtained 5.8dB of the minimum noise figure at 1.4GHz and 5.8dB of the maximum conversion gain at 1.45GHz. Effects of bias and power level of local oscillator frequency are observed and the characteristics are verified.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.18 no.5 s.120
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• pp.486-495
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• 2007

In this paper, we present the design procedure of BPF(Band Pass Filter) for the suppression of LO(Local Oscillator) harmonics. The required suppression at given harmonics is the key issues in such a filter design, while the bandwidth and the suppression of the unwanted signals are more important in the conventional RF filter design. In LO filter design the bandwidth is used for the minimization of the insertion loss for the desired signal. In addition, we propose the novel tuning procedure based on Momentum to consider the unknown parasitic effects, which usually are not included in the circuit design step and results in undesirable and frustrating tuning after fabrication.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.38 no.11
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• pp.63-70
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• 2001

We demonstrate the MMIC (monolithic microwave integrated circuit) frequency doublers generating stable and low-cost 29 GHz local oscillator signals from 14.5 GHz input signals. These devices were designed and fabricated by using the M MIC integration process of $0.1\;{\mu}m$ gate-length PHEMTs (pseudomorphic high electron mobility transistors) and passive components. The measurements showed S11 or -9.2 dB at 145 GHz, S22 of -18.6 dG at 29 GHz and a minimum conversion loss of 18.2 dB at 14.5 GHz with an input power or 6 dBm. Fundamental signal of 14.5 GHz were suppressed below 15.2 dBe compared to the second harmonic signal at the output port, and the isolation characteristics of fundamental signal between the input and the output port were maintained above :i0 dB in the frequency range 10.5 GHz to 18.5 GHz. The chip size of the fabricated MMIC frequency doubler is $1.5{\times}2.2\;mm^2$.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.12
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• pp.91-96
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• 2011

In this paper, a low-power direct-conversion transmitter based on current-mode operation, which satisfies the IEEE 802.15.4 standard, is proposed and implemented in a $0.13{\mu}m$ CMOS technology. The proposed transmitter consists of DACs, LPFs, variable gain I/Q up-conversion mixer, a divide-by-two circuit with LO buffer, and a drive amplifier. By combining DAC, LPF, and variable gain I/Q up-conversion mixer with a simple current mirror configuration, the transmitter's power consumption is reduced and its linearity is improved. The drive amplifier is a cascode amplifier with gain controls and the 2.4GHz I/Q differential LO signals are generated by a divide-by-two current-mode-logic (CML) circuit with an external 4.8GHz input signal. The implemented transmitter has 30dB of gain control range, 0dBm of maximum transmit output power, 33dBc of local oscillator leakage, and 40dBc of the transmit third harmonic component. The transmitter dissipates 10.2mW from a 1.2V supply and the die area of the transmitter is $1.76mm{\times}1.26mm$.

• ETRI Journal
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• v.26 no.3
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• pp.229-240
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• 2004

This paper reports on our development of a dual-mode transceiver for a CMOS high-rate Bluetooth system-onchip solution. The transceiver includes most of the radio building blocks such as an active complex filter, a Gaussian frequency shift keying (GFSK) demodulator, a variable gain amplifier (VGA), a dc offset cancellation circuit, a quadrature local oscillator (LO) generator, and an RF front-end. It is designed for both the normal-rate Bluetooth with an instantaneous bit rate of 1 Mb/s and the high-rate Bluetooth of up to 12 Mb/s. The receiver employs a dualconversion combined with a baseband dual-path architecture for resolving many problems such as flicker noise, dc offset, and power consumption of the dual-mode system. The transceiver requires none of the external image-rejection and intermediate frequency (IF) channel filters by using an LO of 1.6 GHz and the fifth order onchip filters. The chip is fabricated on a $6.5-mm^{2}$ die using a standard $0.25-{\mu}m$ CMOS technology. Experimental results show an in-band image-rejection ratio of 40 dB, an IIP3 of -5 dBm, and a sensitivity of -77 dBm for the Bluetooth mode when the losses from the external components are compensated. It consumes 42 mA in receive ${\pi}/4-diffrential$ quadrature phase-shift keying $({\pi}/4-DQPSK)$ mode of 8 Mb/s, 35 mA in receive GFSK mode of 1 Mb/s, and 32 mA in transmit mode from a 2.5-V supply. These results indicate that the architecture and circuits are adaptable to the implementation of a low-cost, multi-mode, high-speed wireless personal area network.