• Journal of the Korea Academia-Industrial cooperation Society
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• v.15 no.5
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• pp.3121-3131
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• 2014

Vulnerabilities related to memory have been known as major threats to the security of a computer system. Actually, the number of attacks using memory vulnerability has been increased. Accordingly, various memory protection mechanisms have been studied and implemented on operating system while new attack techniques bypassing the protection systems have been developed. Especially, buffer overflow attacks have been developed as Return-Oriented Programing(ROP) and Jump-Oriented Programming(JOP) called Code Re-used attack to bypass the memory protection mechanism. Thus, in this paper, I analyzed code re-use attack techniques emerged recently among attacks related to memory, as well as analyzed various detection mechanisms proposed previously. Based on the results of the analyses, a mechanism that could detect various code re-use attacks on a binary level was proposed. In addition, it was verified through experiments that the proposed mechanism could detect code re-use attacks effectively.

• Database Research
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• v.34 no.3
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• pp.14-27
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• 2018

Recently, to alleviate the memory bottleneck problme occurred in Symmetric Multiprocessing (SMP) architecture, Non-Uniform Memory Access (NUMA) architecture was proposed. In addition, since an aggregation operator is an important operator providing properties and summary of data, the efficiency of the aggregation operator is crucial to overall performance of a system. Thus, in this paper, we propose an efficient aggregation processing technique on NUMA architecture. Our proposed technique consists of partition phase and merge phase. In the partition phase, the target relation is partitioned into several partial relations according to grouping attribute. Thus, since each thread can process aggregation operator on partial relation independently, we prevent the remote memory access during the merge phase. Furthermore, at the merge phase, we improve the performance of the aggregation processing by letting each thread compute aggregation with a local hash table as well as avoiding lock contention to merge aggregation results generated by all threads into one.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.31B no.11
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• pp.45-52
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• 1994

In recent days low cost, high performance microprocessors have led to construction of medium scale shared memory multiprocessor systems with shared bus. Such multiprocessor systems are heavily influenced by the structures of memory systems and memory systems become more important factor in design space as microprocessors are getting faster. Even though local cache memories are very common for such systems, the latency on access to the shared memory limits throughput and scalability. There have been many researches on the memory structure for multiprocessor systems. In this paper, an asynchronous memory architecture is proposed to utilize the bandwith of system bus effectively as well as to provide flexibility of implementation. The effect of the proposed architecture if shown by simulation. We choose, as our model of the shared bus is HiPi+Bus which is designed by ETRI to meet the requirements of the High-Speed Midrange Computer System. The simulation is done by using Verilog hardware decription language. With this simulation, it is explored that the proposed asynchronous memory architecture keeps the utilization of system bus low enough to provide better throughput and scalibility. The implementation trade-offs are also described in this paper. The asynchronous memory is implemented and tested under the prototype testing environment by using test program. This intensive test has validated the operation of the proposed architecture.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.67 no.5
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• pp.656-662
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• 2018

Pattern matching algorithm is widely used in many application fields such as bio-informatics, intrusion detection, etc. Among many string matching algorithms, KMP (Knuth-Morris-Pratt) algorithm is commonly used because of its fast execution time when using large texts. However, the processing speed of KMP algorithm is also limited when the text size increases significantly. In this paper, we propose a high throughput parallel KMP algorithm considering CPU-GPU memory hierarchy based on OpenCL in GPGPU (General Purpose computing on Graphic Processing Unit). We focus on the optimization for the allocation of work-times and work-groups, the local memory copy of the pattern data and the failure table, and the overlapping of the data transfer with the string matching operations. The experimental results show that the execution time of the optimized parallel KMP algorithm is about 3.6 times faster than that of the non-optimized parallel KMP algorithm.

• The Transactions of the Korea Information Processing Society
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• v.7 no.7
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• pp.2219-2228
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• 2000

Caches in a multiprocessing environment introduce the cache coherence problem. When multiple processors maintain locally cached copies of a unique shared-memory location, any local modification of the location can result in a globally inconsistent view of memory. Cache coherence protocols are important to operate a shared-memory multiprocessor system with efficiency and correctness. Since random testing and simulations are not enough to validate correctness of protocols, it is necessary to develop efficient and reliable verification methods. In this appear we present our experience in using VIS (Verification Interacting with Synthesis), a tool of formal method, to analyze a number of property of a cache coherence protocol, RACE (Remote Access Cache coherent Enforcement).

• Molecules and Cells
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• v.41 no.8
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• pp.724-732
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• 2018

Plant defence responses to various biotic stresses via systemic acquired resistance (SAR) are induced by avirulent pathogens and chemical compounds, including certain plant hormones in volatile form, such as methyl salicylate and methyl jasmonate. SAR refers to the observation that, when a local part of a plant is exposed to elicitors, the entire plant exhibits a resistance response. In the natural environment, plants are continuously exposed to avirulent pathogens that induce SAR and volatile emissions affecting neighbouring plants as well as the plant itself. However, the underlying mechanism has not been intensively studied. In this study, we evaluated whether plants "memorise" the previous activation of plant immunity when exposed repeatedly to plant defensive volatiles such as methyl salicylate and methyl jasmonate. We hypothesised that stronger SAR responses would occur in plants treated with repeated applications of the volatile plant defence compound MeSA than in those exposed to a single or no treatment. Nicotiana benthamiana seedlings subjected to repeated applications of MeSA exhibited greater protection against Pseudomonas syringae pv. tabaci and Pectobacterium carotovorum subsp. carotovorum than the control. The increase in SAR capacity in response to repeated MeSA treatment was confirmed by analysing the defence priming of the expression of N. benthamiana Pathogenesis-Related 1a (NbPR1a) and NbPR2 by quantitative reverse-transcription PCR compared with the control. We propose the concept of plant memory of plant defence volatiles and suggest that SAR is strengthened by the repeated perception of volatile compounds in plants.

• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.1177-1180
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• 2005

This paper present a method of constructing the multimedia processor architecture. The proposed multimedia processor architecture be able to handle each text, sound, and video in one chip. Also it have interactive function that is a characteristics of multimedia. Specially, the proposed multimedia processor be able to addressing nodes in memory map without software, and it is completely reconfigurable depend on data. Also it as able to process time and space common that have synchronous/asynchronous and it is able to protect continuous and dynamic media bus collision, and local and overall common memory structure. The proposed multimedia processor architecture apply to virtual reality and mixed reality.

• Journal of Information Display
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• v.12 no.4
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• pp.195-198
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• 2011

Proposed herein is a flexible bistable chiral splay nematic display mode with an enhanced memory retention time under external distortion. By adopting the polymerized reactive-mesogen structure mixed in a liquid crystal layer, local anchoring energy is generated on the boundary between the polymer structures, and the relaxation from the ${\pi}$-twisted state to the initial splay state could be interrupted. As a result, the memory retention time becomes significantly longer, and the stability against the external distortion is enhanced.

• Transactions on Electrical and Electronic Materials
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• v.5 no.4
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• pp.148-152
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• 2004

The direct lateral profile and retention characteristics of locally trapped-charges in the nitride layer of the two-bit polysilicon-oxide-nitride-oxide-silicon (SONOS) memory are investigated by using the charge pumping method. After charges injection at the drain junction region, the lateral diffusion of trapped charges as a function of retention time is directly shown by the results of the local threshold voltage and the trapped-charges quantities.

• Proceedings of the IEEK Conference
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• 2000.11c
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• pp.51-54
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• 2000

Due to the emerging of high-speed network, lots of interests of access to remote data have increased. Those interests motivate using of Cooperative Caching that uses remote cache like local cache by sharing other clients' cache. The conventional algorithm like GMS(Global Memory Service) has some disadvantages that occurred bottleneck and decreasing performance because of exchanges of many messages to server or manager. On the other hand, Hint-based algorithm resolves a GMS's server bottleneck as each client has hint information of all blocks. But Hint-based algorithm also causes some problems such as inaccurate information in it, if it has too old hint information. In this paper, we offer the policy that supplement bottleneck and inaccuracy； by using file identifier that can search for the lookup table and by exchanging oldest block information between each client periodically.