• 한국정밀공학회지
• /
• 제13권6호
• /
• pp.128-135
• /
• 1996

This paper proposes a high precision measurement technique to obtain the height of gage block with a few millimeter height. The proposed technique is consisted of two steps : In the first step, laser position transducer and electric micrometer are adopted to obtain a coarse value of the height of gage block, and then, in the second step, heterodyne laser interferometry is adopted to acquire the precision value. A new kind of phase detector is constructed in the low cost for the heterodyne interferometer and its linearity with ${\pm}1%$ is confirmed by experiment. Also measurement error factors due to enviroments are discussed and methodology to reduce such errors is proposed. Preliminary experiments are carried out for the gage blocks of as high as a few millimeter.

• 한국정밀공학회지
• /
• 제19권9호
• /
• pp.41-50
• /
• 2002

Optical disk system aiming at fast data transfer rate and high-density recording requires the improvement in performance of the pickup head. Especially, the pickup actuator needs better linearity and stability. So, a lever actuator for optical disk is proposed. In this paper, the role of lever and its structure are discussed and the flexure hinge is introduced to enhance the precise movement. Using the Newoton's method, the motion of equation for the lever actuator is obtained. The results are compared with the analysis results by the FEM (Finite Element Method) for the vibration and the magnetic field. Consequently, the lever actuator has the 2"d system characteristics in 3-axis moving directions and superior stability for the external vibration.tion.

• Journal of electromagnetic engineering and science
• /
• 제2권2호
• /
• pp.93-99
• /
• 2002

The Cartesian loop chip which is one of key devices in narrow-band Walky-Talky transmitter using RZ-SSB modulation method was designed and implemented with 0.35 Um CMOS technology. The reduced size and low cost of transmitter were available by the use of direct-conversion and Cartesian loop chip, which improved the power efficiency and linearity of transmitting path. In addition, low power operation was possible through CMOS technology. The performance test results of transmitter showed -23 dBc improvement of IMD level and -30 dEc below suppression of SSB characteristic in the operation of Cartesian loop chip (closed-loop). At that time, the transmitting power was about 37 dBm (5 W). The main parameters to improve the transmitting characteristic and to compensate the distortion in feed back loop such as DC-offset, loop gain and phase value are interfaced with notebook PC to be controlled with S/W.

• Journal of electromagnetic engineering and science
• /
• 제15권2호
• /
• pp.63-75
• /
• 2015

The CMOS power amplifier (PA) is a promising solution for highly-integrated transmitters in a single chip. However, the implementation of PAs using the CMOS process is a major challenge because of the inferior characteristics of CMOS devices. This paper focuses on improvements to the efficiency and linearity of CMOS PAs for modern wireless communication systems incorporating high peak-to-average ratio signals. Additionally, an envelope tracking supply modulator is applied to the CMOS PA for further performance improvement. The first approach is enhancing the efficiency by waveform engineering. In the second approach, linearization using adaptive bias circuit and harmonic control for wideband signals is performed. In the third approach, a CMOS PA with dynamic auxiliary circuits is employed in an optimized envelope tracking (ET) operation. Using the proposed techniques, a fully integrated CMOS ET PA achieves competitive performance, suitable for employment in a real system.

• 제어로봇시스템학회논문지
• /
• 제7권2호
• /
• pp.138-145
• /
• 2001

Measurement errors in a digital measurement systems are mainly due to the consisting elements accuracies and the circuit parameters changes following the environment variations such as temperature. Further, systems non-linearity makes the measurement accuracy worse, and accordingly a linearization method should be considered to avoid this worsening. In this study, a temperature error-correction method and linearization methods are proposed and a digital temperature measurement system utilizing these methods is realized. And the proposed measurement methods are observed to increase the measurement accuracy of the digital measurement system.

• JSTS:Journal of Semiconductor Technology and Science
• /
• 제2권1호
• /
• pp.7-18
• /
• 2002

Single-ended differential RF circuit topologies fully utilizing complementary characteristics of both NMOS and PMOS are proposed, which have inherent advantage of both single-ended and differential circuits. Using this concept, we propose a CCPP (Complementary CMOS parallel push-pull) amplifier which has single-ended input/output with differential amplifying characteristics, leading to more than 30 dB improvement on $IIP_2$. In addition, complementary resistive mixer is also proposed, which provides not only differential IF outputs from single-ended RF input, but much better linearity as well as isolation characteristics. Experimental results using $0.35{\;}\mu\textrm{m}$ CMOS process show that, compared with conventional NMOS resistive mixer, the proposed mixer shows 15 dB better LO-to-IF isolation, 4.6 dB better $IIP_2$, and 4.5 dB better $IIP_3$performances.

• 대한전자공학회:학술대회논문집
• /
• 대한전자공학회 2006년도 하계종합학술대회
• /
• pp.71-72
• /
• 2006

In this paper, we designed and fabricated the Doherty power amplifier which operates at 2140 MHz by using MRF 21125 RF Power FET (Motorola Co.) and Teflon substrate (${\varepsilon}_r$=2.55, H=0.76 mm, t=$70{\mu}m$, $tan{\delta}$=0.001). As a result, we obtained th improved efficiency and linearity in comparison with the conventional balanced amplifier.

• 대한전자공학회논문지
• /
• 제7권2호
• /
• pp.21-25
• /
• 1970

같은 특성의 다이오드를 스위칭 용과 기준 전원 온도보상에 사용하여 온도특성을 개선한 디지탈-아나로그변환기를 연구하였다. 연산 증폭기를 사용함으로써 가산용 체형회로망을 제거금하고 담선된 직선성을 얻었다. Slewing rate 증가를 꾀하여 1.5 mega bit 속도의 디지트 정보를 수신하여 출력전과의 안정된 신호부분이 전주간의 80% 이상 특매도록 하였다.

• 대한전기학회:학술대회논문집
• /
• 대한전기학회 2003년도 하계학술대회 논문집 D
• /
• pp.2690-2692
• /
• 2003

Amplifier linearity plays a major role in the design of mordern communication systems. An independently controllable AM/AM and AM/PM predistortion linearizers that consists of two bias feed resistance linearizers is proposed. This linearizer allows independent adjustment of the AM/AM and AM/PM curves by using two adjustable voltages to compensate the power amplifier non-linearities. The predistortion linearizer can improve the ACPR by SdB with cdma2000 multi carrier signals. By applying this linearizer to two-tone 880MHz power amplifier, an improvement of adjacent channel leakage power up to 5dBm has been achieved.

• 한국정보통신설비학회:학술대회논문집
• /
• 한국정보통신설비학회 2008년도 정보통신설비 학술대회
• /
• pp.403-408
• /
• 2008

In this paper, the high efficiency and linearity Doherty power amplifier using DGS and adaptive bias technique has been designed and realized for 2.3GHz WiBro applications. The Doherty amplifier has been implemented us-ing silicon MRF 281 LDMOS FET. The RF performances of the Doherty power amplifier (a combination of a class AB carrier amplifier and a bias-tuned class C peaking amplifier) have been compared with those of a class AB amplifier alone, and conventional Doherty amplifier. The Maximum PAE of designed Doherty power amplifier with DGS and adaptive bias technique has been 36.6% at 34.01dBm output power. The proposed Doherty power amplifier showed an improvement 1dB at output power and 7.6% PAE than a class AB amplifier alone.