• The Journal of Korean Institute of Communications and Information Sciences
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• v.36 no.9B
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• pp.1082-1091
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• 2011

Power-reduction techniques based on DVFS(Dynamic Voltage and Frequency Scaling) are crucial for lengthening operating times of battery powered mobile systems. This paper proposes an optimal DVFS scheduling algorithm for decoders with memory size limitation on display buffer, which is realistic constraints not properly touched in the previous works. Furthermore, we mathematically prove that the proposed algorithm is optimal in the limited display buffer and limited clock frequency model, and also can be used for feasibility check. Simulation results show the proposed algorithm outperformed the previous heuristic algorithms by 7% in average, and the performance of all algorithms using display buffers saturates at about 10 frame size.

• Proceedings of the IEEK Conference
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• 2002.06b
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• pp.165-168
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• 2002

As the demand for higher data-rate chip-to-chip communication such as memory-to-controller, processor-to-processor increases, low cost high-speed serial links\ulcorner become more attractive. This paper describes a 0.25-fm CMOS 1.6Gbps/pin 4-level transceiver using Stub Series Terminated Logic for high Bandwidth. For multi-gigabit/second application, the data rate is limited by Inter-Symbol Interference (ISI) caused by channel low pass effects, process-limited on-chip clock frequency, and serial link distance. The proposed transceiver uses multi-level signaling (4-level Pulse Amplitude Modulation) using push-pull type, double data rate and flash sampling. To reduce Process-Voltage-Temperature Variation and ISI including data dependency skew, the proposed high-speed calibration circuits with voltage swing controller, data linearity controller and slew rate controller maintains desirable output waveform and makes less sensitive output. In order to detect successfully the transmitted 1.6Gbps/pin 4-level data, the receiver is designed as simultaneous type with a kick - back noise-isolated reference voltage line structure and a 3-stage Gate-Isolated sense amplifier. The transceiver, which was fabricated using a 0.25 fm CMOS process, performs data rate of 1.6 ~ 2.0 Gbps/pin with a 400MHB internal clock, Stub Series Terminated Logic ever in 2.25 ~ 2.75V supply voltage. and occupied 500 * 6001m of area.

• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.791-794
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• 2003

The increasing computational capability of processors is driving the need for high bandwidth links to communicate and store the information that is processed. Such links are often an important part of multi processor interconnection, processor-to-memory interfaces and Serial-network interfaces. This paper describes a 0.11-${\mu}{\textrm}{m}$ CMOS 4 Gbp s/pin 3-Level transceiver using RSL/(Rambus Signaling Logic) for high bandwidth. This system which uses a high-gain windowed integrating receiver with wide common-mode range which was designed in order to improve SNR when operating with the smaller input overdrive of 3-Level. For multi-gigabit/second application, the data rate is limited by Inter-Symbol Interference (ISI) caused by low pass effects of channel, process-limited on-chip clock frequency, and serial link distance. In order to detect the transmited 4Gbps/pin with 3-Level data sucessfully ,the receiver is designed using 3-stage sense amplifier. The proposed transceiver employes multi-level signaling (3-Level Pulse Amplitude Modulation) using clock multi phase, double data rate and Prbs patten generator. The transceiver shows data rate of 3.2 ~ 4.0 Gbps/pin with a 1GHz internal clock.

• Proceedings of the KIEE Conference
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• 1995.11a
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• pp.523-526
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• 1995

This paper presents an improved algorithm of optimal measurement system design with a reliability evaluation method for a large power system. The proposed algorithm is developed to cosider the observability and to achieve highest accuracy of the state estimator as well with the limited investment cost. When the effect on these dummy bus measurements is considered in the proposed algorithm the other errors in the power system is also detected and then analyzed until to achieve the limited values. By taking advantage of the matrix sparsity and the optimal bus ordering the memory and the time are successfully reduced in the P/C's and workstation's model. The improved program is successfully tested for IEEK sample system and KEPCO system with PSS/E lineflow calculated data package.

• Speech Sciences
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• v.11 no.2
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• pp.181-192
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• 2004

This paper presents an efficient speech interactive agent rendering smooth car navigation and Telematics services, by employing embedded automatic speech recognition (ASR), distributed speech recognition (DSR) and text-to-speech (ITS) modules, all while enabling safe driving. A speech interactive agent is essentially a conversational tool providing command and control functions to drivers such' as enabling navigation task, audio/video manipulation, and E-commerce services through natural voice/response interactions between user and interface. While the benefits of automatic speech recognition and speech synthesizer have become well known, involved hardware resources are often limited and internal communication protocols are complex to achieve real time responses. As a result, performance degradation always exists in the embedded H/W system. To implement the speech interactive agent to accommodate the demands of user commands in real time, we propose to optimize the hardware dependent architectural codes for speed-up. In particular, we propose to provide a composite solution through memory reconfiguration and efficient arithmetic operation conversion, as well as invoking an effective out-of-vocabulary rejection algorithm, all made suitable for system operation under limited resources.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.6 no.6
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• pp.1689-1706
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• 2012

The preservation of temporal dependencies among a group of processes that exchange continuous media at runtime is a key issue for emerging mobile distributed systems (MDS), such as monitoring of biosignals and interactive multiuser games. Although several works are oriented to satisfy temporal dependencies, most of them are not suitable for MDSs. In general, an MDS is characterized by the absence of global references (e.g. shared memory and wall clock), host mobility, limited processing and storage capabilities in mobile hosts, and limited bandwidth on wireless communication channels. This paper proposes an asymmetric synchronization protocol to be used at runtime in an MDS without using a common reference. One main aspect of our synchronization protocol is that it translates temporal constraints to causal dependencies of the continuous media data as seen by the mobile hosts. We simulate the protocol by considering a cellular network environment and by using MPEG-4 encoders. The simulation results show that our protocol is effective in reducing the synchronization error. In addition, the protocol is efficient in terms of processing and storage costs at the mobile devices, as well as in the overhead attached per message across the wired and wireless channels.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2002.05a
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• pp.201-204
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• 2002

Although the reuse of the cached data for scrolling the map reduces the amount of passed data between client and server, it needs the conversions of data coordinates, selective deletion of objects and cache compaction at client. The conversion is time intensive operation due to limited resources of mobile phones such as low computing power, small memory. Therefore, for the efficient map control in the vector map service based mobile phone, it is necessary to study the method for reducing wireless network bandwidth and for overwhelming the limited resources of mobile phone as well. This paper proposes the methods for caching pre-received spatial objects in client-server systems for mobile GIS. We also analyze the strengths and drawbacks between the reuse of cached data and transmission of raw data respectively.

• Journal of the Semiconductor & Display Technology
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• v.20 no.3
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• pp.184-188
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• 2021

In general, digital signage is a next-generation smart media that provides various information and advertisement services to many people indoors or outdoors using the Internet. Recently, digital signage is rapidly spreading in such a small indoor environment, that is, in an area closely related to daily life, for example, inside an elevator. However, in this kind of indoor environment where the stay time of persons is extremely limited, it would be not easy for them to keep advertisements in the user memory for a long time. In the digital signage display installed in an indoor environment, it is possible to think about the possibility for a function such as expanding the screen to a user's smartphone, which is now widely spread, to contain, store, and use the transmitted content. In this paper, we propose a method to extend the display of digital signage contents to personal smart phones with interaction function in such a limited environment. In order to make the system operation, the proposed system was verified by confirming the result of dual screen implementation in a smart phone through the prototype implementation of a digital signage system in an embedded Linux environment.

• Journal of Platform Technology
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• v.10 no.4
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• pp.62-69
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• 2022

Flight control systems installed on unmanned aircraft require thorough verification from the design stage. This verification is made through the integrated flight control test environment. Typically, a debugger is used to monitor the internal state of a flight control computer in real time. Emulator with a real-time memory monitor and trace is relatively expensive. The JTAG Emulator is unable to operate in real time and has limitations that cannot be caught up with the processing speed of latest high-speed processors. In this paper, we describe the results of the development of internal monitoring software for drone flight control computer processors based on NUTTX/PIXHAWK. The results of this study show that the functions provided compared to commercial debugger are limited, but it can be sufficiently used to verify the flight control system using this system under limited budget.

• International Journal of Advanced Culture Technology
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• v.12 no.3
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• pp.148-158
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• 2024

We investigate Autism Spectrum Disorder (ASD), which is typified by deficits in social interaction, repetitive behaviors, limited vocabulary, and cognitive delays. Traditional diagnostic methodologies, reliant on expert evaluations, frequently result in deferred detection and intervention, particularly in South Korea, where there is a dearth of qualified professionals and limited public awareness. In this study, we employ advanced deep learning algorithms to enhance early ASD screening through automated video analysis. Utilizing architectures such as Convolutional Long Short-Term Memory (ConvLSTM), Long-term Recurrent Convolutional Network (LRCN), and Convolutional Neural Networks with Gated Recurrent Units (CNN+GRU), we analyze video data from platforms like YouTube and TikTok to identify stereotypic behaviors (arm flapping, head banging, spinning). Our results indicate that the LRCN model exhibited superior performance with 79.61% accuracy on the augmented platform video dataset and 79.37% on the original SSBD dataset. The ConvLSTM and CNN+GRU models also achieved higher accuracy than the original SSBD dataset. Through this research, we underscore AI's potential in early ASD detection by automating the identification of stereotypic behaviors, thereby enabling timely intervention. We also emphasize the significance of utilizing expanded datasets from social media platform videos in augmenting model accuracy and robustness, thus paving the way for more accessible diagnostic methods.