• Title/Summary/Keyword: Lift-off process

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Head Slider Design Using Approximation Method For Load/Unload Applications (근사화 기법을 이용한 Load/Unload 용 헤드 슬라이더 최적설계)

  • Son, Seok-Ho;Yoon, Sang-Joon;Park, No-Cheol;Park, Young-Pil;Choi, Dong-Hoon
    • Transactions of the Society of Information Storage Systems
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    • v.2 no.3
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    • pp.169-177
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    • 2006
  • In this study, we present the optimization of a head slider using kriging method in order to reduce lift-off force during unloading process with satisfying reliable flying attitude in steady state. To perform an optimization process efficiently, a simplified lift-off force model, which is a function of air bearing suction force and flying attitudes, is created by kriging method. The EMDIOS, which is the process integration and design optimization software developed by iDOT, is used to automatically wrap the analysis with the optimization and efficiently implements the repetitive works between analyzer and optimizer. An optimization problem is formulated to reduce the lift-off force during unloading process while satisfying the flying attitude in reliable range over the entire recording band and reducing the probability of contact between slider and disk. The simulation result shows that the amplitude of lift-off force of optimized L/UL slider is reduced about 62%, compared with that of initial slider model. It is demonstrated by the dynamics L/UL simulation that the optimum slider incorporated with the suspension is not only smoothly loaded onto disk but also properly unloaded onto the ramp.

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Fabrication of TFTs for LCD using 3-Mask Process

  • You, Soon-Sung;Cho, Heung-Lyul;Kwon, Oh-Nam;Nam, Seung-Hee;Chang, Yoon-Gyoung;Kim, Ki-Yong;Cha, Soo-Yeoul;Ahn, Byung-Chul;Chung, In-Jae
    • Journal of Information Display
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    • v.6 no.3
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    • pp.18-21
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    • 2005
  • A new technology for reducing photolithography process from a four step to a three step process in the fabrication of TFT LCD is introduced. The core technology for 3-mask-TFT processes is the lift-off process [1], by which the PAS and PXL layers can be formed simultaneously. A different method of the lift-off process was developed in order to enhance the performance of efficiency with conventional positive and not negative PR which is the generally used in other lift-off process. In addition, the removal capacity of the ITO/PR in lift-off process was evaluated. The evaluation results showed that the new process can be run in conventional TFT production condition. In order to apply this new process in existing TFT process, several tests were conducted to ensure stability of the TFT process. It was found that the outgases from PR on the substrate in ITO sputtering chamber do not raise any problem, and the deposited ITO film beside the PR has conventional ITO qualities. Furthemore, the particles that were produced due to the ITO chips in PR strip bath could be reduced by the existing filtering system of stripper. With the development of total process and design of the structure for TFT using this technology, 3-mask-panels were achieved in TN and IPS modes, which showed the same display performances as those with the conventional 4mask process. The applicability and usefulness of the 3-mask process has already verified in the mass production line and in fact it currently being used for the production of some products.

Fabrication of a Graphene Nanoribbon with Electron Beam Lithography Using a XR-1541/PMMA Lift-Off Process

  • Jeon, Sang-Chul;Kim, Young-Su;Lee, Dong-Kyu
    • Transactions on Electrical and Electronic Materials
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    • v.11 no.4
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    • pp.190-193
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    • 2010
  • This report covers an effective fabrication method of graphene nanoribbon for top-gated field effect transistors (FETs) utilizing electron beam lithography with a bi-layer resists (XR-1541/poly methtyl methacrylate) process. To improve the variation of the gating properties of FETs, the residues of an e beam resist on the graphene channel are successfully taken off through the combination of reactive ion etching and a lift-off process for the XR-1541 bi-layer. In order to identify the presence of graphene structures, atomic force microscopy measurement and Raman spectrum analysis are performed. We believe that the lift-off process with bi-layer resists could be a good solution to increase gate dielectric properties toward the high quality of graphene FETs.

A Study on HEMT Device Process (Part I. Lift-off Process for the Metallization) (HEMT 소자 공정 연구 (Part 1. 금속박막 형성을 위한 Lift-off 공정연구))

  • 이종람;박성호;김진섭;마동성
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.26 no.10
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    • pp.1535-1544
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    • 1989
  • The overhang structure of photoresist in optical lithography was studied for the metallization of GaAs-related devices throughout lift-off method. Optical contact aligner with a dose of 8.5 m J/cm\ulcornerand with a wavelength of 300mm was used for ultraviolet exposure of single layer of S1400-27 photoresist. The overhang thickness shows a linear relationship with the soaking time in monochlorobenzene, which its magnitude becomes high at elevated softbake temperature. Such process conditions as a low softbake temperature, a long monochlorohbenzene soaking time and a little exposed energy make the development rate of photoresist lower. The optimum process conditions to obtain a target line-width, which include an appropriate overhang structure such as complete separation between the sidewall of photoresist pattern and the deposited metal edge, are determined as the softbake temperature of 64-74\ulcornerC, the monochlorobenzene soaking time of 10-15min, the ultraviolet exposure time of 70-100sec and the development time of 50-80sec.

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Decrease of Gate Leakage Current by Employing Al Sacrificial Layer Deposited on a Tilted and Rotated Substrate in the DLC-coated Si-tip FEA Fabrication (DLC-coated Si-tip FEA 제조에 있어서 기판 상에 경사-회전 증착된 Al 희생층을 이용한 Gate누설 전류의 감소)

  • 주병권;김영조
    • Journal of the Microelectronics and Packaging Society
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    • v.7 no.3
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    • pp.27-29
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    • 2000
  • For the DLC-coaled Si-tip FEA, the modified lift off-process, by which DLC coated on both gate electrode surface and gate insulator in the gate aperture could be removed, was proposed. In the process, the Al sacrificial layer was deposited on a tilted and rotated substrate by an e-beam evaporation, and DLC film was coated on the substrate by PA-CVD method. Afterward the DLC was perfectly removed except the DLC films coated on emitter tips by etch-out of Al sacrificial layer. Current-voltage curves and current fluctuation of the DLC-coated Si-tip FEA showed that the proposed lift-off process played an important role in decreasing gate leakage current and stabilizing omission current.

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Integrated Optimal Design for Suspension to Improve Load/unload Performance (로드/언로드 성능향상을 위한 서스팬션의 구조최적화)

  • Kim Ki-Hoon;Son Suk-Ho;Park Kyoung-Su;Yoon Sang-Joon;Park No-Cheol;Yang Hyun-Seok;Choi Dong-Hoon;Park Young-pil
    • 정보저장시스템학회:학술대회논문집
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    • 2005.10a
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    • pp.204-209
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    • 2005
  • Load/Unload(L/UL) technology includes the benefits, that is, increased areal density, reduced power consumption and improved shock resistance contrary to contact-start-stop(CSS). It has been widely used in portable hard disk drive and will become the key technology far developing the small form factor hard disk drive. The main object of L/UL is no slider-disk contact or no media damage. For realizing those, we must consider many design parameters in L/UL system. In this paper, we focus on lift-off force. The 'lift-off' force, defined as the minimum air bearing force, is another very important indicator of unloading performance. A large amplitude of lift-off force increases the ramp force, the unloading time, the slider oscillation and contact-possibility. To minimize 'lift-off' force we optimizes the slider and suspension using the integrated optimization frame, which automatically integrates the analysis with the optimization and effectively implements the repetitive works between them. In particular, this study is carried out the optimal design considering the process of modes tracking through the entire optimization processes. As a result, we yield the equation which can easily find a lift-off force and structural optimization for suspension.

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A Formation of Hole Pattern on Ti Electrode by Lift-off and Its Application to TCO-less Dye-sensitized Solar Cells (Ti 전극의 Lift-off 공정을 이용한 홀 패턴 형성과 TCO-less 염료감응형 태양전지의 응용)

  • Jung, Haeng-Yun;Ki, Hyun-Chul;Gu, Hal-Bon
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.28 no.3
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    • pp.175-179
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    • 2015
  • In this study, we propose Ti hole pattern structure on the transparent conductive oxide (TCO) less dye-sensitized solar cells (DSSCs) using the lift-off process to improve the low light transmittance and low efficiency caused by opaque Ti electrode. The formation of Ti hole patterns make it possible to move the dye adsorption and electrolyte. The DSSCs with Ti hole patterns showed a higher photoelectric conversion efficiency (PCE) than those with general structure by 11.1%. As a result, The Ti hole pattern structure can be improved to increase the light absorption of the dyes and PCE of the TCO-less DSSCs is also increased.

The fabrication of RTD via Lift-off process (Lift-off법에 의한 RTD의 제조)

  • 김종성;원종각
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2000.11a
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    • pp.299-302
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    • 2000
  • RTD temperature sensor is a thermoresistor which uses the liner dependence of the resistance of the sensing material on the temperature, and has good stability and sensibility, so it can be used in highly precise temperature measurement. In this study RTD sensor was fabricated using Pt thin film. The Pt thin film was deposited on alumina using DC-Sputter, and annealed with various temperature. Through the experiments of XRD, AFM, 4-point probe, the surface structure of the thin film with annealing conditions and their effects on the electrical resistance were investigated. RTD with serpentine pattern was fabricated using Lift-off and resistance-temperature characteristics were studied.

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The Preparation of Surface Acoustic Wave Filter using Lift-off method (리프트오프 방식을 이용한 탄성표면파 필터의 제조)

  • Lee, Dong-Yoon;Park, Jae-Joon;Yoon, Seok-Jin
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2005.07a
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    • pp.242-243
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    • 2005
  • SAW filters were fabricated on $LiNbO_3$ substrates to evaluate frequency response and properties of photolithography. In the both of etch and lift-off methods, lift off method was superior to etch method in fabrication process. Frequency response property was measured by network analyzer. From a measurement of acoustic property, SAW propagation velocity was 3574.9m/sec for $LiNbO_3$ SAW filter.

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The fabrication of TFTs for LCD using the 3mask process

  • Yoo, Soon-Sung;Cho, Heung-Lyul;Kwon, Oh-Nam;Nam, Seung-Hee;Chang, Yoon-Gyoung;Kim, Ki-Yong;Cha, Soo-Yeoul;Ahn, Byung-Chul;Chung, In-Jae
    • 한국정보디스플레이학회:학술대회논문집
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    • 2005.07b
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    • pp.948-951
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    • 2005
  • New technology that reduces photolithography process steps from 4 to 3 in fabrication of TFT LCD is introduced. The core technology for 3mask-TFTs is the lift-off process [1], by which the PAS and PXL layer are formed simultaneously. To evaluate the stability of this lift-off process, outgases from photo resist on a substrate during ITO deposition and the quality of ITO film were analyzed and the conventional photo resist stripper machine which operates lift-off process was examined to see its ability to reduce particle problems of the machine. Through the development of total process and design for TFTs using this 3mask technology, panels in TN and IPS modes which exhibit same performances of a display using a conventional process were achieved. In addition, this process was already verified in the mass production line and now some products are being produced by the 3mask technology.

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