• Title/Summary/Keyword: Leakage information

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Nonvolatile Ferroelectric P(VDF-TrFE) Memory Transistors Based on Inkjet-Printed Organic Semiconductor

  • Jung, Soon-Won;Na, Bock Soon;Baeg, Kang-Jun;Kim, Minseok;Yoon, Sung-Min;Kim, Juhwan;Kim, Dong-Yu;You, In-Kyu
    • ETRI Journal
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    • v.35 no.4
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    • pp.734-737
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    • 2013
  • Nonvolatile ferroelectric poly(vinylidene fluoride-co-trifluoroethylene) memory based on an organic thin-film transistor with inkjet-printed dodecyl-substituted thienylenevinylene-thiophene copolymer (PC12TV12T) as the active layer is developed. The memory window is 4.5 V with a gate voltage sweep of -12.5 V to 12.5 V. The field effect mobility, on/off ratio, and gate leakage current are 0.1 $cm^2/Vs$, $10^5$, and $10^{-10}$ A, respectively. Although the retention behaviors should be improved and optimized, the obtained characteristics are very promising for future flexible electronics.

Reliability of N/O($SiO_2$/$Si_3$$N_4$) Films According to Top Oxidation Condition (상부산화 조건에 따른 N/O($SiO_2$/$Si_3$$N_4$) 구조막의 신뢰성 평가)

  • 구경완;홍봉식
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.29A no.9
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    • pp.20-28
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    • 1992
  • Dielectric thin film of N/O ($Si_{3]N_{4}/SiO_{2}$) for high density stacked dynamic-RAM cell was formed by LPCVD and oxidation(dry & pyrogenic oxidation methods) of the top 7nm $Si_{3]N_{4}$ film. The thickness, structure and composition of this film were measured by ellipsometer, high resolution TEM, AES and SIMS. The insulating characteristics(I-V characteristics) were investigated by HP 4145, and the characteristics of TDDB (Time Dependent Dielectric Breakdown) were evaluated by using CCST(Current Constant Stress Time) method. In this experiment, The optimum oxidation condition for preparation of good insulating and TDDB characteristics of N/O film was pyrogenic oxidation at 85$0^{\circ}C$ for 30 minutes. The leakage current was reduced from 400pA to 7.5pA when SiO$_{2}$ film with thickness of 2nm was formed on the top of $Si_{3]N_{4}$ film by the pyrogenic oxidation method.

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Self-Aligned $n^+$ -pPolysilicon-Silicon Junction Structure Using the Recess Oxidation (Recess 산화를 이용한 자기정렬 $n^+$ -p 폴리실리콘-실리콘 접합구조)

  • 이종호;박영준;이종덕;허창수
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.30A no.6
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    • pp.38-48
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    • 1993
  • A recessed n-p Juction diode with the self-aligned sturcture is proposed and fabricated by using the polysilicon as an n$^{+}$ diffusion source. The diode structure can be applicable to the emitter-base formation of high performance bipolar divice and the n$^{+}$ polysilicone mitter has an important effect on the device characteristics. The considered parameters for the polysilicon formation are the deposition condition. As$^{+}$ dose for the doping of the polysilicon and the annealing condition using RTP system. The vertical depth profiles of the fabricated diode are obtained by SIMS and the electrical characteristics are analyzed in terms of the ideality factor of diode (n), contact resistance and reverse leakage current. In addition, n$^{+}$-p junction diodes are formed by using the amorphous silicon (of combination of amorphous and polysiliocn) instead of polysilicon and their characteristics are compared with those of the standard sample. The As$^{+}$ dose for the formation of good junction is about 1~2${\times}10^{16}cm^{2}$ at given RTA conditions (1100.deg. C, 10sec).

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A Study For Characteristic of Forward Converter using Planar Magnetic Components (플레너 자기 소자를 이용한 포워드 컨버터의 특성 연구)

  • Choi, Hyun-Sik;Lee, Jae-Hak;Park, Kyung-Su
    • Journal of the Institute of Electronics Engineers of Korea TE
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    • v.37 no.1
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    • pp.89-98
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    • 2000
  • This paper presented a design technique of planar magnetic components for forward converter. Planar magnetic components are a good solution for high frequency switching-mode power supplies(SMPS). Since these kind of magnetic components have some advantages(low leakage inductance, low profile, low weight, minimum EMI etc.) that improve the SMPS performance, their use is growing in the last years. In this paper, the performance of designed system is verified by simulation and experiment by comparing the system using conventional magnetic components and the system using planar magnetic components.

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A Study on Composition of Current Stable Negative Resistance Circuitwith LED and CdS. (광전소자를 이용한 전류안정부저항 특성회로의 구성)

  • Park, Ui-Yeol;Do, Si-Hong;Mun, Jae-Deok
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.12 no.5
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    • pp.1-5
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    • 1975
  • 접합형 트린지스터와 발광다이오드(LED) 및 광도전소자(CdS)로서 구성된 광결합 전류안정부저항회로를 진안하였다. 이는 일반적으로 광트랜지스터보다도 더 예민한 것을 이용하여, CdS와 LED를 밀착 시켜서 LED에 흐르는 전류와 CdS의 실효저항변화로써 결합된 광결합방식을 택하였다. 트랜지스터의 콜랙터-에미터간에 인위적인 누변저항을 삽입하는 방법을 도입함으로써 부저항치 및 최대입력단자전압치를 임의로 변화할 수 있게 하였으며, 제안한 회로를 분석하고 또 이를 실험적으로 확인하였다. 누변저항을 1KΩ에서 30KΩ까지 변화시켰을 때 최대입력단자전압은 1.65V에서 4.22V로 변하였고, 부저항치는 -1.0KΩ에서 -10.0KΩ까지 변하였다. 또 실험치에 대한 계산치에의 상대백분최대오차가 11%이었다. A current stable negative resistance circuit has been constucted with combination of coulplementary symmetrical transistors, a light emitting diode and a photoconductive cell. The negative resistance(Rn) and break-over voltage(VBo) can be set at a designed value according to adjustment of the artificial leakage resistance of p-n-p transistor. The RN and VBo calculated in this designed circuit are checked though the experiments, the errors are found less than 11%.

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Implementation of Adult Authentication System Using Smartphone and Near-Field Communication (스마트폰과 근거리 무선 통신을 이용한 성인 인증 시스템의 개발)

  • Lee, Chongho;Lee, Seongsoo
    • Journal of IKEEE
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    • v.19 no.4
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    • pp.617-624
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    • 2015
  • In this paper, an adult authentication system based on authentication certificate was designed and implemented using smartphone and near-field communication. It has three advantages. First, it achieves easy, convenient, and fast authentication by using smartphone and near-field communication. Second, it achieves extremely high security and reliability by exploiting authentication certificate. Third, it achieves extremely low risk of personal information leakage by generating and sending only virtual identification code. Finally, it has a proper legal basis by Digital Signature Act. It consists of adult authentication module, near-field communication control module, policy server module, and database server module. A prototype of the proposed system was designed and implemented, and it was verified to have correct operation.

Design of Electronic ID System Satisfying Security Requirements of Authentication Certificate Using Fingerprint Recognition (지문 인식을 이용하여 공인인증서의 보안 요건을 만족하는 전자 신분증 시스템의 설계)

  • Lee, Chongho;Lee, Seongsoo
    • Journal of IKEEE
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    • v.19 no.4
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    • pp.610-616
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    • 2015
  • In this paper, an electronic ID system satisfying security requirements of authentication certificate was designed using fingerprint recognition. The proposed electronic ID system generates a digital signature with forgery prevention, confidentiality, content integrity, and personal identification (=non-repudiation) using fingerprint information, and also encrypts, sends, and verify it. The proposed electronic ID system exploits fingerprint instead of user password, so it avoids leakage and hijacking. And it provides same legal force as conventional authentication certificate. The proposed electronic ID consists of 4 modules, i.e. HSM device, verification server, CA server, and RA client. Prototypes of all modules are designed and verified to have correct operation.

A delay model for CMOS inverter (CMOS 인버터의 지연 시간 모델)

  • 김동욱;최태용;정병권
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.34C no.6
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    • pp.11-21
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    • 1997
  • The delay models for CMOS invertr presented so far predicted the delay time quite accurately whens input transition-time is very small. But the problem that the accuracy is inclined to decrease becomes apparent as input transition tiem increases. In this paper, a delay model for CMOS inverter is presented, which accuractely predicts the delay time even though input transition-time increases. To inverter must be included in modeling process because the main reason of inaccuracy as input transition tiem is the leakage current through the complementary MOS. For efficient modeling, this paper first models the MOSes with simple I-V charcteristic, with which both the pMOS and the nMOS are considered easily in calculating the inverter delay times. This resulting model needs few parameters and re-models each MOS effectively and simply evaluates output voltage to predict delay time, delay values obtained from this effectively and simply evaluates output voltage to predict delay time, delay values obtained from this model have been found to be within about 5% error rate of the SPICE results. The calculation time to predict the delay time with the model from this paper has the speed of more than 70times as fast as to the SPICE.

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Reliability on the Unintended Trips of Residual Current Operated Circuit Breakers due to Surge Currents (서지전류에 의한 누전차단기의 의도하지 않은 트립에 대한 신뢰성)

  • Lee, Bok-Hee;Kim, Sang-Hyun;Kim, Yoo-Ha
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.26 no.5
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    • pp.79-84
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    • 2012
  • As the huge economical loss and function paralysis of information technology-based systems can be caused by the misoperation of residual current devices(RCDs) due to surge voltages and currents, RCDs shall not operate by surge currents. In this paper, in order to evaluate the reliability of residual current operated circuit-breakers with integral overcurrent protection for household and similar uses((RCBOs) stressed by surges, the unintended trip characteristics of RCBOs under surge currents were experimentally investigated using the combination wave generator. Seven different types of single-phase RCBOs being present on the domestic market were investigated according to KS C IEC 61009-1 standard. As a result, all kinds of specimens were satisfied the requirements for 0.5 [${\mu}s$]/100[kHz] ring wave impulse currents. Most of specimens stressed by the 8/20[${\mu}s$] impulse current tripped at least one or more, and some of them were broken down during consecutive tests. It was found that only one type of specimens meets the L-N mode immunity to the combination wave of 1.2/50[${\mu}s$] impulse voltage and 8/20[${\mu}s$] impulse current.

A Study on the Off-Line Parameter Estimation for Sensorless 3-Phase Induction Motor using the D-Axis Model in Stationary Frame (정지좌표계 d축 모델을 이용한 위치센서 없는 3상 유도전동기의 오프라인 제정수 추정에 관한 연구)

  • Mun, Tae-Yang;In, Chi-Gak;Kim, Joohn-Sheok
    • The Transactions of the Korean Institute of Power Electronics
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    • v.25 no.1
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    • pp.13-20
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    • 2020
  • Accurate parameters based on equivalent circuit are required for high-performance field-oriented control in a three-phase induction motor. In a normal case, stator resistance can be accurately measured using a measuring equipment. Except for stator resistance, all machine parameters on the equivalent circuit should be estimated with particular algorithms. In the viewpoint of traditional regions, the parameters of an induction motor can be identified through the no-load and standstill test. This study proposes an identification method that uses the d-axis model of the induction motor in a stationary frame with the predefined information on stator resistance. Mutual inductance is estimated on the rotational dq coordination similar to that in the traditional no-load experiment test. The leakage inductance and rotor resistance can be estimated simply by applying different voltages and frequencies in the d-axis model of the induction motor. The proposed method is verified through simulation and experimental results.