• Journal of the Korean Ceramic Society
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• 제39권5호
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• pp.511-516
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• 2002

Hexagonal $YMnO_3$ thin films were prepared from $Y(NO_3)_3{\cdot}5H_2O$ and $Mn(CH_3CO_2)_2{\cdot}4H_2O$ as starting materials on the Si(100) substrates by the sol-gel method. The crystal structure and the electrical properties of the $YMnO_3$ thin films were investigated as a function of heat treatment temperature, the amount of water(Rw) of hydrolysis and the addition of catalysis. The crystallization of the $YMnO_3$ thin film began at 700${\circ}C$ and completed at 800${\circ}C$ for 1 h. The c-axis (0001) preferred orientation of hexagonal $YMnO_3$ was detected for the $YMnO_3$ thin films with Rw=6 and that was decreased for the $YMnO_3$ thin films with Rw=1 and Rw=12. The crystallinity and preferred orientation of the $YMnO_3$ thin films were depended on the addition of acid and/or alkali catalysis, which, in turn, the preferred orientation of c-axis was decreased and the orthorhombic phase of $YMnO_3$ was detected to the specimens with the addition of catalysis. The $YMnO_3$ thin film with Rw=6 showed good leakage current density of $1.2{\times}10-8 A/cm^2$ at the applied voltage of 0.2V and the leakage current density was not changed drastically with applied voltage.

• Journal of the Institute of Electronics Engineers of Korea SD
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• 제46권12호
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• pp.18-23
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• 2009

The effect of hydrogen-nitrogen annealing on the interface trap properties of Metal-Oxide-Nitride-Oxide-Silicon (MONOS) capacitors is investigated by analyzing the capacitors' gate leakage current and the interface trap density between the Si and $SiO_2$ layer. MONOS samples annealed at $850^{\circ}C$ for 30 s by rapid thermal annealing (RTA) are treated by additional annealing in a furnace, using annealing eases $N_2$ and 2% hydrogen and 98% nitrogen gas mixture $(N_2-H_2)$ at $450^{\circ}C$ for 30 mins. Among the three samples as-deposited, annealed in $N_2$ and $N_2-H_2$, MONOS sample annealed in an $N_2-H_2$ environment is found to have the lowest increase of interface-trap density from the capacitance-voltage experiments. The leakage current of sample annealed in $N_2-H_2$ is also lower than that of sample annealed in $N_2$.

• Korean Journal of Materials Research
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• 제10권2호
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• pp.160-165
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• 2000

We have investigated the electrical and diffusion barrier properties of MgO produced on the surface of Cu (Mg) alloy. Also the diffusion barrier property of the interfacial MgO between Cu alloy and $SiO_2$ has been examined. The results show that the $150\;{\AA}$-MgO layer on the surface remains stable up to $700^{\circ}C$, preventing the interdiffusion of C Cu and Si in Si/MgO/Cu(Mg) structure. It also has the breakdown voltage of 4.5V and leakage current density of $10^{-7}A/\textrm{cm}^2/$. In addition, the combined structure of $Si_3N4(100{\AA})/MgO(100{\AA})$ increases the breakdown voltage up to lOV and reduces the leakage current density to $8{\tiems}10^{-7}A/\textrm{cm}^2$. Furthermore, the interfacial MgO formed by the chemical reac­t tion of Mg and $SiO_2$ reduces the diffusion of copper into $SiO_2$ substrate. Consequently, Cu(Mg) alloy can be applied as a g gate electrode in TFT /LCDs, reducing the process steps.

• Proceedings of the Korean Vacuum Society Conference
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• 한국진공학회 2013년도 제44회 동계 정기학술대회 초록집
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• pp.410-410
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• 2013

Next-generation nonvolatile memory (NVM) has attracted increasing attention about emerging NVMs such as ferroelectric random access memory, phase-change random access memory, magnetic random access memory and resistance random access memory (RRAM). Previous studies have demonstrated that RRAM is promising because of its excellent properties, including simple structure, high speed and high density integration. Many research groups have reported a lot of metal oxides as resistive materials like TiO2, NiO, SrTiO3 and ZnO [1]. Among them, the ZnO-based film is one of the most promising materials for RRAM because of its good switching characteristics, reliability and high transparency [2]. However, in many studies about ZnO-based RRAMs, there was a problem to get lower current level for reducing the operating power dissipation and improving the device reliability such an endurance and an retention time of memory devices. Thus in this paper, we investigated that highly reproducible bipolar resistive switching characteristics of W doped ZnO RRAM device and it showed low resistive switching current level and large ON/OFF ratio. This may be caused by the interdiffusion of the W atoms in the ZnO film, whch serves as dopants, and leakage current would rise resulting in the lowering of current level [3]. In this work, a ZnO film and W doped ZnO film were fabricated on a Si substrate using RF magnetron sputtering from ZnO and W targets at room temperature with Ar gas ambient, and compared their current levels. Compared with the conventional ZnO-based RRAM, the W doped ZnO ReRAM device shows the reduction of reset current from ~$10^{-6}$ A to ~$10^{-9}$ A and large ON/OFF ratio of ~$10^3$ along with self-rectifying characteristic as shown in Fig. 1. In addition, we observed good endurance of $10^3$ times and retention time of $10^4$ s in the W doped ZnO ReRAM device. With this advantageous characteristics, W doped ZnO thin film device is a promising candidates for CMOS compatible and high-density RRAM devices.

• Journal of the Korea Institute of Information and Communication Engineering
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• 제13권2호
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• pp.348-354
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• 2009

It has analyzed that the device degradation by NBTI (Negative Bias Temperature Instability) stress induced the increase of gate-induced-drain-leakage(GIDL) current for p-MOSFETs. It is shown that the degradation magnitude, as well as its time, temperature, and field dependence, is govern by interface traps density at the silicon/oxide interface. from the relation between the variation of threshold voltage and subthreshold slope, it has been found that the dominant mechanism for device degradation is the interface state generation. From the GIDL measurement results, we confined that the EHP generation in interface state due to NBTI stress led to the increase of GIDL current. Therefore, one should take care of the increased GIDL current after NBTI stress in the ultra-thin gate oxide device. Also, the simultaneous consideration of reliability characteristics and dc device performance is highly necessary in the stress engineering of nanoscale CMOSFETs.

• Current Optics and Photonics
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• 제3권6호
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• pp.583-589
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• 2019

We report experimental results on 940-nm 350-mW AlGaAs/InGaAs transverse single-mode laser diodes (LDs) adopting graded-index separate confinement heterostructures (GRIN-SCH) and p,n-clad asymmetric structures, with improved temperature and small-divergence beam characteristics under high-output-power operation, for a three-dimensional (3D) motion-recognition sensor. The GRIN-SCH design provides good carrier confinement and prevents current leakage by adding a grading layer between cladding and waveguide layers. The asymmetric design, which differs in refractive-index distribution of p-n cladding layers, reduces the divergence angle at high-power operation and widens the transverse mode distribution to decrease the power density around emission facets. At an optical power of 350 mW under continuous-wave (CW) operation, Gaussian narrow far-field patterns (FFP) are measured with the full width at half maximum vertical divergence angle to be 18 degrees. A threshold current (I_th) of 65 mA, slope efficiency (SE) of 0.98 mW/mA, and operating current (I_op) of 400 mA are obtained at room temperature. Also, we could achieve catastrophic optical damage (COD) of 850 mW and long-term reliability of 60℃ with a TO-56 package.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• 제15권8호
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• pp.664-670
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• 2002

The electrical characteristics of $ZnO-Pr_6O_{11}-CoO-Cr_2O_3-Y_2O_3$(ZPCCY)-based varistors were investigated with $Y_2O_3$ content in the range of 0.0~4.0 mol%. As $Y_2O_3$ content is increased, the average grain size was markedly decreased in the range of 18.6~3.2 $\mu m$ and the density of the ceramic was decreased in the range of 5.53 ~3.74 $g/\textrm{cm}^3$. While, the varistor voltage was increased in the range of 39.4~748.1 V/mm and the nonlinear exponent was in the range of 4.5~51.2 with increasing $Y_2O_3$ content. The addition of $Y_2O_3$ greatly enhanced the nonlinear properties of varistors, compared with the varistor without $Y_2O_3$. In particular, the varistors with $Y_2O_3$content of 0.5 mol% exhibited the highest nonlinearity, in which the nonlinear exponent is 51.2 and the leakage current is 1.3 $\mu A$. The donor concentration and the density of interface states were decreased in the range of (4.19~0.14) $\times$10$^{18}$ /㎤ and (5.38~1.15)${\times}10^{18}/\textrm{cm}^3$, respectively, with increasing $Y_2O_3$ content.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• 제22권4호
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• pp.350-354
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• 2009

$Al_{2}O_{3}$ thin films were deposited on GaN(0001) by using a Remote Plasma Atomic Layer Deposition(RPALD) technique with a trimethylaluminum(TMA) precursor and oxygen radicals in the temperature range of $25{\sim}500^{\circ}C$. The growth rate per cycle was varied with the substrate temperature from $1.8{\AA}$/cycle at $25^{\circ}C$ to $0.8{\AA}$/cycle at $500^{\circ}C$. The chemical structure of the $Al_{2}O_{3}$ thin films was studied using X-ray photoelectron spectroscopy(XPS). The electrical properties of $Al_{2}O_{3}$/GaN Metal-Insulator-Semiconductor (MIS) capacitor grown at a $300^{\circ}C$ process temperature were excellent, a low electrical leakage current density(${\sim}10^{-10}A/cm^2$ at 1 MV) at room temperature and a high dielectric constant of about 7.2 with a thinner oxide thickness of 12 nm. The interface trap density($D_{it}$) was estimated using a high-frequency C-V method measured at $300^{\circ}C$. These results show that the RPALD technique is an excellent choice for depositing high-quality $Al_{2}O_{3}$ as a Sate dielectric in GaN-based devices.

• Proceedings of the Korean Vacuum Society Conference
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• 한국진공학회 2014년도 제46회 동계 정기학술대회 초록집
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• pp.462-462
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• 2014

The effect of rear passivation for passivated emitter and rear cell (PERC) using ozone and H2O oxidant of atomic layer deposited (ALD) Al2O3 was studied by post-annealing in N2 and forming gas ambients. Rear surface of PERC solar cell was passivated by Al2O3 grown by ALD with ozone and H2O oxidant. Al2O3 grown by ALD with ozone oxidant has been known to have many advantages, such as lower interface defects, low leakage current density. Its passivation quality is better than Al2O3 with H2O. Al2O3 layer with 10 nm and 20 nm thickness was grown at $150^{\circ}C$ with ozone oxidant and at $250^{\circ}C$ with H2O oxidant. And then each samples were post-annealled at $450^{\circ}C$ in N2 ambients and at $850^{\circ}C$ in forming gas ambients. The passivation quality was investigated by measuring the minority carrier lifetime respectively. We examined atomic layer deposited Al2O3 such as growth rate, film density, thickness, negative fixed charge density at AlOx/Si interface, and reflectance. The influences of process temperature and heat treatment were investigated using Sinton (WCT-120) by Quasi-Steady State Photoconductance (QSSPC) mode. Ozone-based ALD Al2O3 film shows the best carrier lifetime at lower deposition temperature than H2O-based ALD.

• Korean Journal of Materials Research
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• 제22권8호
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• pp.409-415
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• 2012

$TiO_2$ thin films for high energy density capacitors were prepared by r.f. magnetron sputtering at room temperature. Flexible PET (Polyethylene terephtalate) substrate was used to maintain the structure of the commercial film capacitors. The effects of deposition pressure on the crystallization and electrical properties of $TiO_2$ films were investigated. The crystal structure of $TiO_2$ films deposited on PET substrate at room temperature was unrelated to deposition pressure and showed an amorphous structure unlike that of films on Si substrate. The grain size and surface roughness of films decreased with increasing deposition pressure due to the difference of mean free path. X-ray photoelectron spectroscopy (XPS) analysis revealed the formation of chemically stable $TiO_2$ films. The dielectric constant of $TiO_2$ films was significantly changed with deposition pressure. $TiO_2$ films deposited at low pressure showed high dissipation factor due to the surface microstructure. The dielectric constant and dissipation factor of films deposited at 70 mTorr were found to be 100~120 and 0.83 at 1 kHz, respectively. The temperature dependence of the capacitance of $TiO_2$ films showed the properties of class I ceramic capacitors. $TiO_2$ films deposited at 10~30 mTorr showed dielectric breakdown at applied voltage of 7 V. However, the films of 500~300 nm thickness deposited at 50 and 70 mTorr showed a leakage current of ${\sim}10^{-8}{\sim}10^{-9}$ A at 100 V.