• 제목/요약/키워드: Leakage Error

검색결과 169건 처리시간 0.025초

플래시 및 바이트 소거형 EEPROM을 위한 고집적 저전압 Scaled SONOS 비휘발성 기억소자 (High Density and Low Voltage Programmable Scaled SONOS Nonvolatile Memory for the Byte and Flash-Erased Type EEPROMs)

  • 김병철;서광열
    • 한국전기전자재료학회논문지
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    • 제15권10호
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    • pp.831-837
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    • 2002
  • Scaled SONOS transistors have been fabricated by 0.35$\mu\textrm{m}$ CMOS standard logic process. The thickness of stacked ONO(blocking oxide, memory nitride, tunnel oxide) gate insulators measured by TEM are 2.5 nm, 4.0 nm and 2.4 nm, respectively. The SONOS memories have shown low programming voltages of ${\pm}$8.5 V and long-term retention of 10-year Even after 2 ${\times}$ 10$\^$5/ program/erase cycles, the leakage current of unselected transistor in the erased state was low enough that there was no error in read operation and we could distinguish the programmed state from the erased states precisely The tight distribution of the threshold voltages in the programmed and the erased states could remove complex verifying process caused by over-erase in floating gate flash memory, which is one of the main advantages of the charge-trap type devices. A single power supply operation of 3 V and a high endurance of 1${\times}$10$\^$6/ cycles can be realized by the programming method for a flash-erased type EEPROM.

An Analytical Study on the Performance Analysis of a Unit-In-jector System of a Diesel Engine

  • Kim, Chul-Ho;Lee, Jong-Soo
    • Journal of Mechanical Science and Technology
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    • 제17권1호
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    • pp.146-156
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    • 2003
  • A numerical algorithm is developed to analyze the performance of a Unit-injector (UI) System for a diesel engine. The fundamental theory of the algorithm is based on the continuity equation of fluid dynamics. The loss factors that should be seriously regarded on the continuity equation are the compressibility effect of liquid fuel, the wall friction loss in high-pressure fuel lines of the system, the kinetic energy loss of fuel in the system, and the leakage of fuel out of the control volume. For an evaluation of the developed simulation algorithm, the calculation results are compared with the experimental outputs provided by the Technical Research Center of Doowon Precision Industry Co. (DPICO) ; the maximum pressure in the plunger chamber (P$\_$p/) and total amount of fuel injected into a cylinder per cycle (Q$\_$f/) at each operational condition. The result shows that the average error rate (%) of P$\_$p/ and Q$\_$f/ are 2.90% and 4.87%, respectively, in the specified operational conditions. Hence, it can be concluded that the analytical simulation algorithm developed in this study can be reasonably applied to the performance prediction of newly designed UI system.

연료전지용 저소음 재생형 송풍기의 개발 (Development of a Low-noise Regenerative Blower for Fuel Cell Application)

  • 김준곤;이광영;이찬;길현권;정경호;황상문
    • 한국유체기계학회 논문집
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    • 제17권2호
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    • pp.48-53
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    • 2014
  • A low-noise regenerative blower is developed for fuel cell application by combining the FANDAS-Regen code and design optimization algorithm under several performance constraints for flow capacity, static pressure, efficiency and power consumption. The optimized blower design model is manufactured with some impeller modification based on low noise design concept and tested by using aerodynamic performance chamber facility and narrow-band noise measurement apparatus. The measured results of the optimized blower satisfy the performance requirements and are also compared favorably with the FANDAS-Regen prediction results within a few percent relative error. Furthermore, the present study shows the remarkable noise reduction by 26 dBA can be achieved through design optimization and low noise design concept.

실험계획법을 이용한 다목적 차량의 측면하중 측정을 위한 3축 로드셀 개발 (Development of 3-axis Loadcell for Measuring the Side Force of MPV Using Design of Experiment)

  • 추성일;박준협;이진근;박지영
    • 한국자동차공학회논문집
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    • 제15권4호
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    • pp.83-93
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    • 2007
  • This paper represents the development of 3-axises loadcell for measuring the side-force of suspension module of MPV(Multi Purposed Vehicle). The side force causes the failure of damper, such as leakage. The loadcell was developed using strain gauges, and the Wheastone bridge circuit to compensate for the cross-talk between the each axises and the measurement error by temperature. Structure analysis of loadcell was accomplished with FEM(Finite Element Method) to optimize the location of strain gages. The design optimization for important factors that have an effect on performance of loadcell was accomplished by using DOE(Design of Experiment). Loadcell was produced and successfully tested, showing good sensitivity and low cross-talk. The cross-talk of the developed loadcell is bellow 5%. The load history was measured at proving ground. The maximum side-force, the longitudinal force, and vertical force of MPV are 4.2 kN, 8.0 kN, and 17.0 kN, respectively, at Belgian road.

고밀도 프로빙 테스트를 위한 수직형 프로브카드의 제작 및 특성분석 (Development and Characterization of Vertical Type Probe Card for High Density Probing Test)

  • 민철홍;김태선
    • 한국전기전자재료학회논문지
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    • 제19권9호
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    • pp.825-831
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    • 2006
  • As an increase of chip complexity and level of chip integration, chip input/output (I/O) pad pitches are also drastically reduced. With arrival of high complexity SoC (System on Chip) and SiP (System in Package) products, conventional horizontal type probe card showed its limitation on probing density for wafer level test. To enhance probing density, we proposed new vertical type probe card that has the $70{\mu}m$ probe needle with tungsten wire in $80{\mu}m$ micro-drilled hole in ceramic board. To minimize alignment error, micro-drilling conditions are optimized and epoxy-hardening conditions are also optimized to minimize planarity changes. To apply wafer level test for target devices (T5365 256M SDRAM), designed probe card was characterized by probe needle tension for test, contact resistance measurement, leakage current measurement and the planarity test. Compare to conventional probe card with minimum pitch of $50{\sim}125{\mu}m\;and\;2\;{\Omega}$ of average contact resistance, designed probe card showed only $22{\mu}$ of minimum pitch and $1.5{\Omega}$ of average contact resistance. And also, with the nature of vertical probing style, it showed comparably small contact scratch and it can be applied to bumping type chip test.

극지방 빙하량 변화 (ice-mass balance) 관측과 에러 분석 (Ice mass balance over the polar region and its uncertainty)

  • 서기원
    • 한국지구물리탐사학회:학술대회논문집
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    • 한국지구물리탐사학회 2007년도 특별 심포지엄 논문집
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    • pp.63-72
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    • 2007
  • Current estimates of the ice-mass balance over the Greenland and the Antarctica using retrievals of time-varying gravity from GRACE are presented. Two different GRACE gravity data, UTCSR RL01 and UTCSR RL04, are used for the estimates to examine the impact of the relative accuracy of background models in the GRACE data processing for inter-annual variations of GRACE gravity data. In addition, the ice-mass balance is appraised from the conventional GRACE data, which represents global gravity, and the filtered GRACE data, which isolates the terrestrial gravity effect from GRACE gravity data. The former estimate shows that there exists similar negative trends of ice-mass balance over the Greenland from UTCSR RL01 and UTCSR RL04 while the time series from the both GRACE data over the Antarctica differ significantly from each other, and no apparent trends are observed. The result for the Greenland from the latter calculation is similar to the former estimate. However, the latter calculation presents positive trends of ice-mass balance for the Antarctica from both GRACE data. These results imply that residual oceanic geophysical signals, particularly for ocean tides, significantly corrupt the ice-mass estimate over the Antarctica as leakage error. In addition, the spatial alias of GRACE is likely to affect the ice-mass balance because the spatial spectrum of ocean tides is not conserved via GRACE sampling, and thus ocean tides contaminate terrestrial gravity signal. To minimize the alias effect, I suggest to use the combined gravity models from GRACE, SLR and polar motion.

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Beamforming Optimization for Multiuser Two-Tier Networks

  • Jeong, Young-Min;Quek, Tony Q.S.;Shin, Hyun-Dong
    • Journal of Communications and Networks
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    • 제13권4호
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    • pp.327-338
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    • 2011
  • With the incitation to reduce power consumption and the aggressive reuse of spectral resources, there is an inevitable trend towards the deployment of small-cell networks by decomposing a traditional single-tier network into a multi-tier network with very high throughput per network area. However, this cell size reduction increases the complexity of network operation and the severity of cross-tier interference. In this paper, we consider a downlink two-tier network comprising of a multiple-antenna macrocell base station and a single femtocell access point, each serving multiples users with a single antenna. In this scenario, we treat the following beamforming optimization problems: i) Total transmit power minimization problem; ii) mean-square error balancing problem; and iii) interference power minimization problem. In the presence of perfect channel state information (CSI), we formulate the optimization algorithms in a centralized manner and determine the optimal beamformers using standard convex optimization techniques. In addition, we propose semi-decentralized algorithms to overcome the drawback of centralized design by introducing the signal-to-leakage plus noise ratio criteria. Taking into account imperfect CSI for both centralized and semi-decentralized approaches, we also propose robust algorithms tailored by the worst-case design to mitigate the effect of channel uncertainty. Finally, numerical results are presented to validate our proposed algorithms.

CMOS 인버터의 지연 시간 모델 (A delay model for CMOS inverter)

  • 김동욱;최태용;정병권
    • 전자공학회논문지C
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    • 제34C권6호
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    • pp.11-21
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    • 1997
  • The delay models for CMOS invertr presented so far predicted the delay time quite accurately whens input transition-time is very small. But the problem that the accuracy is inclined to decrease becomes apparent as input transition tiem increases. In this paper, a delay model for CMOS inverter is presented, which accuractely predicts the delay time even though input transition-time increases. To inverter must be included in modeling process because the main reason of inaccuracy as input transition tiem is the leakage current through the complementary MOS. For efficient modeling, this paper first models the MOSes with simple I-V charcteristic, with which both the pMOS and the nMOS are considered easily in calculating the inverter delay times. This resulting model needs few parameters and re-models each MOS effectively and simply evaluates output voltage to predict delay time, delay values obtained from this effectively and simply evaluates output voltage to predict delay time, delay values obtained from this model have been found to be within about 5% error rate of the SPICE results. The calculation time to predict the delay time with the model from this paper has the speed of more than 70times as fast as to the SPICE.

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Time- and Frequency-Domain Optimization of Sparse Multisine Coefficients for Nonlinear Amplifier Characterization

  • Park, Youngcheol;Yoon, Hoijin
    • Journal of electromagnetic engineering and science
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    • 제15권1호
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    • pp.53-58
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    • 2015
  • For the testing of nonlinear power amplifiers, this paper suggests an approach to design optimized multisine signals that could be substituted for the original modulated signal. In the design of multisines, complex coefficients should be determined to mimic the target signal as much as possible, but very few methods have been adopted as general solutions to the coefficients. Furthermore, no solid method for the phase of coefficients has been proven to show the best resemblance to the original. Therefore, in order to determine the phase of multisine coefficients, a time-domain nonlinear optimization method is suggested. A frequency-domain-method based on the spectral response of the target signal is also suggested for the magnitude of the coefficients. For the verification, multisine signals are designed to emulate the LTE downlink signal of 10 MHz bandwidth and are used to test a nonlinear amplifier at 1.9 GHz. The suggested phase-optimized multisine had a lower normalized error by 0.163 dB when N = 100, and the measurement results showed that the suggested multisine achieved more accurate adjacent-channel leakage ratio (ACLR) estimation by as much as 12 dB compared to that of the conventional iterative method.

지능형 최적화 기법 이용한 하이브리드 자기부상 시스템의 설계 (Design of Hybrid Magnetic Levitation System using Intellignet Optimization Algorithm)

  • 조재훈;김용태
    • 전기학회논문지
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    • 제66권12호
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    • pp.1782-1791
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    • 2017
  • In this paper, an optimal design of hybrid magnetic levitation(Maglev) system using intelligent optimization algorithms is proposed. The proposed maglev system adopts hybrid suspension system with permanent-magnet(PM) and electro magnet(EM) to reduce the suspension power loss and the teaching-learning based optimization(TLBO) that can overcome the drawbacks of conventional intelligent optimization algorithm is used. To obtain the mathematical model of hybrid suspension system, the magnetic equivalent circuit including leakage fluxes are used. Also, design restrictions such as cross section areas of PM and EM, the maximum length of PM, magnetic force are considered to choose the optimal parameters by intelligent optimization algorithm. To meet desired suspension power and lower power loss, the multi object function is proposed. To verify the proposed object function and intelligent optimization algorithms, we analyze the performance using the mean value and standard error of 10 simulation results. The simulation results show that the proposed method is more effective than conventional optimization methods.