• 제목/요약/키워드: Layout optimization

검색결과 276건 처리시간 0.028초

양자컴퓨팅 기술 연구개발 동향 (R&D Status of Quantum Computing Technology)

  • 백충헌;황용수;김태완;최병수
    • 전자통신동향분석
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    • 제33권1호
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    • pp.20-33
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    • 2018
  • The calculation speed of quantum computing is expected to outperform that of existing supercomputers with regard to certain problems such as secure computing, optimization problems, searching, and quantum chemistry. Many companies such as Google and IBM have been trying to make 50 superconducting qubits, which is expected to demonstrate quantum supremacy and those quantum computers are more advantageous in computing power than classical computers. However, quantum computers are expected to be applicable to solving real-world problems with superior computing power. This will require large scale quantum computing with many more qubits than the current 50 qubits available. To realize this, first, quantum error correction codes are required to be capable of computing within a sufficient amount of time with tolerable accuracy. Next, a compiler is required for the qubits encoded by quantum error correction codes to perform quantum operations. A large-scale quantum computer is therefore predicted to be composed of three essential components: a programming environment, layout mapping of qubits, and quantum processors. These components analyze how many numbers of qubits are needed, how accurate the qubit operations are, and where they are placed and operated. In this paper, recent progress on large-scale quantum computing and the relation of their components will be introduced.

저용량 가전용 40V급 Power MOSFET 소자의 설계 및 제작에 관한 연구 (A Design of 40V Power MOSFET for Low Power Electronic Appliances)

  • 강이구;안병섭;남태진;김범준;이용훈;정헌석
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2009년도 하계학술대회 논문집
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    • pp.115-115
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    • 2009
  • Current sensing in power semiconductors involves sensing of over-current in order to protect the device from harsh conditions. This technique is one of the most important functions in stabilizing power semiconductor device modules. The Power MOSFET is very efficient method with low power consumption, fast sensing speed and accuracy. In this paper, we have analyzed the characteristics of proposed sense FET and optimized its electrical characteristics to apply conventional 40 V power MOSFET by numerical and simulation analysis. The proposed sense FET has the n-drift doping concentration $1.5\times10^{14}\;cm^{-3}$, size of $600\;{\mu}m^2$ with $4.5\;{\Omega}$, and off-state leakage current below $50\;{\mu}A$. We offer the layout of the proposed Power MOSFET to process actually. The offerd design and optimization methods are meaningful, which the methods can be applied to the power devices having various breakdown voltages for protection.

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경로 추적 방식의 AGV를 위한 경로 계획 (Path Planning for AGVs with Path Tracking)

  • 도주철;김정민;정경훈;우승범;김성신
    • 로봇학회논문지
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    • 제5권4호
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    • pp.332-338
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    • 2010
  • This paper presents a study of path-planning method for AGV(automated guided vehicle) based on path-tracking. It is important to find an optimized path among the AGV techniques. This is due to the fact that the AGV is conditioned to follow the predetermined path. Consequently, the path-planning method is implemented directly affects the whole AGV operation in terms of its performance efficiency. In many existing methods are used optimization algorithms to find optimized path. However, such methods are often prone with problems in handling the issue of inefficiency that exists in system's operation due to inherent undue time delay created by heavy load of complex computation. To solve such problems, we offer path-planning method using modified binary tree. For the purpose of our experiment, we initially designed a AGV that is equiped with laser navigation, two encoders, a gyro sensor that is meant to be operated within actual environment with given set of constrictions and layout for the AGV testing. The result of our study reflects the fact that within such environments, the proposed method showed improvement in its efficiency in finding optimized path.

Conceptual design of prestressed slab bridges through one-way flexural load balancing

  • Arici, Marcello;Granata, Michele Fabio
    • Structural Engineering and Mechanics
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    • 제48권5호
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    • pp.615-642
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    • 2013
  • In this paper a study on prestressed concrete slab bridges is presented. A design philosophy based on the concept of load balancing through prestressing is proposed in order to minimize the effects of delayed deformations due to creep. Aspects related to the stress redistribution inside these bridges for time-dependent phenomena are analyzed and discussed, by applying the principles of aging linear visco-elasticity. Prestressing is seen as an equivalent external load which counterbalances the permanent loads applied to the bridge, nullifying the elastic deflections due to sustained loads, and thus avoiding the related delayed deformations. An optimization of the structural behavior through the use of one-way prestressing is achieved. The determination of a convenient variable depth of slab bridges and the correspondent layout of tendons is considered as a useful means for applying the load balancing concept in actual cases of structures like long cantilevers or bridge decks. A case-study related to the slab bridges built 30 years ago at Jeddah in Saudi Arabia is presented and discussed, in order to show the effectiveness of the proposed approach to the conceptual design of prestressed concrete bridges.

북미 Tier2 Bin5 규제 대응을 위한 디젤 SCR 개발 (Diesel SCR Development to Meet US Tier2 Bin5 Emission Regulation)

  • 이강원;강중훈;조청훈
    • 한국자동차공학회논문집
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    • 제19권2호
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    • pp.98-104
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    • 2011
  • The introduction of a diesel engine into the passenger car and light duty applications in the United States involves significant technical challenges for the automotive makers. This paper describes the SCR System optimization procedure for such a diesel engine application to meet Tier2 Bin5 emission regulation. A urea SCR system, a representative $NO_x$ reduction after-treatment technique, is applied to a 3.0 liter diesel engine. To achieve the maximum $NO_x$ reduction performance, the exhaust system layout was optimized using series of the computational fluid dynamics and the urea distribution uniformity test. Furthermore a comprehensive simulation model for the key factors influencing $NO_x$ reduction performance was developed and embedded in the Simulink/Matlab environment. This model was then applied to the urea SCR system and played a key role to shorten the time needed for SCR control parameter calibration. The potential of a urea SCR system for reducing diesel $NO_x$ emission is shown for FTP75 and US06 emission standard test cycle.

생태계 제어 시설물의 설계 및 배치 최적화(2) -흐름장에서의 인공어초의 침하 및 매몰 특성- (Structural and Layout Design Optimization of Ecosystem Control Structures (2) -Characteristics of Subsidence and Burial of Artificial Habitat due to Sediment Transport in Flow Field-)

  • 류청로;김현주;이한수;신동일
    • 한국수산과학회지
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    • 제30권1호
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    • pp.139-147
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    • 1997
  • Sediment transport around artificial habitat which is induced by the change ol flow due to installation of the structure plays a role not only as a defect function of subsidence and burial but also bottom-environment control function. This study examined the characteristics of local scouring and deposition with sediment sizes, current velocities and installation direction of artificial habitat in flow field. Resultant subsidence and burial processes are investigated and discussed with Reynolds number. Together with sediment number and dimensionless time elapse, prediction formulas are established by combining these relationships. Bottom control function as cultivating effects is discussed with installation direction, and applicability of countermeasures is compared and stone pavement method is recommended.

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RF MOSFET의 단위 Finger 폭에 대한 $f_T$$f_{max}$ 종속성 분석 (Analysis of $f_T$ and $f_{max}$ Dependence on Unit Finger Width for RF MOSFETs)

  • 차지용;차준영;정대현;이성현
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2008년도 하계종합학술대회
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    • pp.389-390
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    • 2008
  • The dependence of $f_T$ and $f_{max}$ on the unit finger width is measured and analyzed for $0.13{\mu}m$ MOSFETs. The increase of $f_T$ at narrow width is attributed by the parasitic gate-bulk capacitance, and the decrease of $f_T$ at wide width is generated by the reduction of increasing rate of $g_{mo}$. The increase of $f_{max}$ at narrow width is originated from the abrupt reduction of gate resistance due to the non-quasi-static effect. These analysis results will be valuable information for layout optimization to improve $f_T$ and $f_{max}$.

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Development of Evaluation Metrics for Pedestrian Flow Optimization in a Complex Service Environment Based on Behavior Observation Method

  • Bahn, Sang-Woo;Lee, Chai-Woo;Kwon, Sang-Hyun;Yun, Myung-Hwan
    • 대한인간공학회지
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    • 제29권4호
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    • pp.647-654
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    • 2010
  • In a service environment, the spatial layout is an important factor that has a great impact on customers' behavioral characteristics including wayfinding and purchasing. Previous studies have shown a gap between marketing, focusing solely on profitability and satisfaction, and architecture, looking only into efficiency of pedestrian flow. To balance such disparity, this study suggests an integrated approach for assessing behavioral patterns in complex service environments. With the objective that complex service environments should aim to increase its profitability and efficiency while guaranteeing customer satisfaction, quantitative metrics was developed for evaluation. The metrics was defined to use data from behavior observation including path tracking, population counting, and gaze analysis, while previous studies have relied on abstract survey methods that were prone to sampling errors and loss of data. For validation of the metrics in a real world setting, a case study was conducted at 4 train stations in Korea. In the case study, experiments were conducted to gather the required data in all 4 train stations, while their physical layouts were also analyzed. With the results from the case study, comparative evaluation of the 4 train stations in terms of behavioral efficiency was possible, together with a discussion on the effect of their physical settings.

단위 픽셀 회로의 간소화를 통해서 해상도를 향상시킨 이차원 윤곽 검출용 시각칩 (Vision chip for edge detection with resolution improvement through simplification of unit-pixel circuit)

  • 성동규;공재성;현효영;신장규
    • 센서학회지
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    • 제17권1호
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    • pp.15-22
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    • 2008
  • When designing image sensors including a CMOS vision chip for edge detection, resolution is a significant factor to evaluate the performance. It is hard to improve the resolution of a bio-inspired CMOS vision using a resistive network because the vision chip contains many circuits such as a resistive network and several signal processing circuits as well as photocircuits of general image sensors such as CMOS image sensor (CIS). Low resolution restricts the use of the application systems. In this paper, we improve the resolution through layout and circuit optimization. Furthermore, we have designed a printed circuit board using FPGA which controls the vision chip. The vision chip for edge detection has been designed and fabricated by using $0.35{\mu}m$ double-poly four-metal CMOS technology, and its output characteristics have been investigated.

풍력발전기용 기어트레인의 특성에 관한 연구 (An Investigation on the Characteristics of Gear Trains of Wind turbines)

  • 박노길;이형우
    • Journal of Advanced Marine Engineering and Technology
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    • 제34권6호
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    • pp.806-815
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    • 2010
  • 풍력발전기용 증속기는 유성기어시스템과 헬리컬기어(또는 스퍼기어) 쌍으로 구성된다. 본 연구에서는 AGMA2001 및 ISO281기준으로 설계된 기존 및 제안된 기어열로 구성된 기어트레인들에 대하여 동력전달 특성들을 비교 분석하였다. 기어트레인의 레이아웃 설계는 기어트레인의 총중량, 출력밀도, 99% 수명시간, 최대 기어 굽힘/면압응력이 산출되었다. 설계에 사용된 설계요구조건들은 블레이드 접선속도 40 ~ 100 m/s, 1000 ~ 1800 rpm 의 발전기 입력속도, 그리고 1 ~ 8 MW의 동력 범위이다. 따라서 본 연구에서 도출된 기어열의 특성들은 기어트레인의 고 신뢰성/초 경량화 설계에 기초자료로 활용될 수 있다.