• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.114.1-114.1
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• 2014

Copper is considered to be the most promising substrate for the growth of high-quality and large area graphene by chemical vapor deposition (CVD), in particular, on the (111) facet. Because the interactions between graphene and Cu substrates influence the orientation, quality, and properties of the synthesized graphene, we studied the interactions using angle-resolved photoemission spectroscopy. The evolution of both the Shockley surface state of the Cu(111) and the p band of the graphene was measured from the initial stage of CVD growth to the formation of a monolayer. Graphene growth was initiated along the Cu(111) lattice, where the Dirac band crossed the Fermi energy ($E_F$) at the K point without hybridization with the d-band of Cu. Then two rotated domains were additionally grown as the area covered with graphene became wider. The Dirac energy was about 0.4 eV and the energy of the Shockley surface state of Cu(111) shifted toward the $E_F$) by 0.15 eV upon graphene formation. These results indicate weak interactions between graphene and Cu, and that the electron transfer is limited to that between the Shockley surface state of Cu(111) and the p band of graphene. This weak interaction and slight lattice mismatch between graphene and Cu resulted in the growth of rotated graphene domains ($9.6^{\circ}$ and $8.4^{\circ}$), which showed no significant differences in the Dirac band with respect to different orientations. These rotated graphene domains resulted in grain boundaries which would hinder a large-sized single monolayer growth on Cu substrates.

• 한국정보디스플레이학회:학술대회논문집
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• 2000.01a
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• pp.57-58
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• 2000

we have grown vertically aligned carbon nanotubes on a large area of Co-Ni codeposited Si substrates by thermal chemical vapor deposition using $C_2H_2$ gas. The carbon nanotubes grown by the thermal chemical vapor deposition are multi-wall structure, and the wall suface of nanotubes is covered with defective carbons or carbonaceous particles. The carbon nanotubes range from 50 to 120 nm in diameter and about 130 ${\mu}m$ in length at $950\;^{\circ}C$. Steric hindrance between nanotubes at an initial stage of the growth forces nanotubes to align vertically. The turn-on voltage was about 0.8 $V/{\mu}m$ with a current density of 0.1 ${\mu}A/cm^2$ and emission current reveals the Fowler-Nordheim mode.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.08a
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• pp.146.2-146.2
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• 2013

Copper is considered to be the most promising substrate for the growth of high-quality and large area graphene by chemical vapor deposition (CVD), in particular, on the (111) facet. Because the interactions between graphene and Cu substrates influence the orientation, quality, and properties of the synthesized graphene, we studied the interactions using angle-resolved photoemission spectroscopy. The evolution of both the Shockley surface state of the Cu(111) and the ${\pi}$ band of the graphene was measured from the initial stage of CVD growth to the formation of a monolayer. Graphene growth was initiated along the Cu(111) lattice, where the Dirac band crossed the Fermi energy (EF) at the K point without hybridization with the d-band of Cu. Then two rotated domains were additionally grown as the area covered with graphene became wider. The Dirac energy was about -0.4 eV and the energy of the Shockley surface state of Cu(111) shifted toward the EF by ~0.15 eV upon graphene formation. These results indicate weak interactions between graphene and Cu, and the electron transfer is limited to that between the Shockley surface state of Cu(111) and the ${\pi}$ band of graphene. This weak interaction and slight lattice mismatch between graphene and Cu resulted in the growth of rotated graphene domains ($9.6^{\circ}$ and $8.4^{\circ}$), which showed no significant differences in the Dirac band with respect to different orientations. These rotated graphene domains resulted in grain boundaries which would hinder a large-sized single monolayer growth on Cu substrates.

• Korean Journal of Remote Sensing
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• v.29 no.1
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• pp.57-68
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• 2013

Large-scale coastal construction projects, such as land reclamation and dykes, were constructed from the late twentieth century in Yoobu-Do region. Land reclamation combined with the dynamics of tidal currents may have accelerated local sedimentation and erosion resulting in rapid reformation of coastal topography. This study presents the results of the topography changes around Yoobu-Do by large-scale coastal constructions using time-series waterline extraction technique of Landsat TM/ETM+ data acquired from 1998 to 2012. Furthermore, the Freeman-Durden decomposition was applied to fully polarimetric RADARSAT-2 SAR data in order to analyze the scattering mechanisms of the deposited surface. According to the case study, the deposition areas were over 4.5 $km^2$ and distributed in the east, northeast, and west of Yoobu-Do. In the eastern deposition area, it was found that the scattering mechanism was difference from other deposition areas possibly indicating that different types of soil were deposited.

• Proceedings of the Materials Research Society of Korea Conference
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• 2011.10a
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• pp.35.1-35.1
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• 2011

New photovoltaic (PV) materials and manufacturing approaches are needed for meeting the demand for lower-cost solar cells. The prototypal thin-film photovoltaic absorbers (CdTe and $Cu(In,Ga)Se_2$) can achieve solar conversion efficiencies of up to 20% and are now commercially available, but the presence of toxic (Cd,Se) and expensive elemental components (In, Te) is a real issue as the demand for photovoltaics rapidly increases. To overcome these limitations, there has been substantial interest in developing viable alternative materials, such as $Cu_2ZnSnS_4$ (CZTS) is an emerging solar absorber that is structurally similar to CIGS, but contains only earth abundant, non-toxic elements and has a near optimal direct band gap energy of 1.4~1.6 ev and a large absorption coefficient of ${\sim}10^4\;cm^{-1}$. The CZTS absorber layers are grown and investigated by various fabrication methods, such as thermal evaporation, e-beam evaporation with a post sulfurization, sputtering, non-vacuum sol-gel, pulsed laser, spray-pyrolysis method and electrodeposition technique. In the present work, we report an alternative method for large area deposition of CZTS thin films that is potentially high throughput and inexpensive when used to produce monolithically integrated solar panel modules. Specifically, we have developed an aqueous chemical approach based on chemical bath deposition (CBD) with a subsequent sulfurization heat treatment. Samples produced by our method were analyzed by scanning electron microscopy, X-ray diffraction, transmission electron microscopy, absorbance and photoluminescence. The results show that this inexpensive and relatively benign process produces thin films of CZTS exhibiting uniform composition, kesterite crystal structure, and good optical properties. A preliminary solar cell device was fabricated to demonstrate rectifying and photovoltaic behavior.

• Proceedings of the Materials Research Society of Korea Conference
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• 2012.05a
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• pp.99.1-99.1
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• 2012

The thin-film photovoltaic absorbers (CdTe and $Cu(In,Ga)Se_2$) can achieve solar conversion efficiencies of up to 20% and are now commercially available, but the presence of toxic (Cd,Se) and expensive elemental components (In, Te) is a real issue as the demand for photovoltaics rapidly increases. To overcome these limitations, there has been substantial interest in developing viable alternative materials, such as $Cu_2ZnSnS_4$ (CZTS) is an emerging solar absorber that is structurally similar to CIGS, but contains only earth abundant, non-toxic elements and has a near optimal direct band gap energy of 1.4 - 1.6 eV and a large absorption coefficient of ~104 $cm^{-1}$. The CZTS absorber layers are grown and investigated by various fabrication methods, such as thermal evaporation, e-beam evaporation with a post sulfurization, sputtering, non-vacuum sol-gel, pulsed laser, spray-pyrolysis method and electrodeposition technique. In the present work, we report an alternative aqueous chemical approach based on chemical bath deposition (CBD) method for large area deposition of CZTS thin films. Samples produced by our method were analyzed by scanning electron microscopy, X-ray diffraction, transmission electron microscopy, absorbance and photoluminescence. The results show that this inexpensive and relatively benign process produces thin films of CZTS exhibiting uniform composition, kesterite crystal structure, and some factors like triethanolamine, ammonia, temperature which strongly affect on the morphology of CZTS film.

• Proceedings of the Korean Vacuum Society Conference
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• 2000.02a
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• pp.186-186
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• 2000

After LeComber et al. reported the first amorphous hydrogenated silicon (a-Si: H) TFT, many laboratories started the development of an active matrix LCDs using a-Si:H TFTs formed on glass substrate. With increasing the display area and pixel density of TFT-LCD, however, high mobility TFTs are required for pixel driver of TF-LCD in order to shorten the charging time of the pixel electrodes. The most important of these drawbacks is a-Si's electron mobiliy, which is the speed at which electrons can move through each transistor. The problem of low carier mobility for the a-Si:H TFTs can be overcome by introducing polycrystalline silicon (poly-Si) thin film instead of a-Si:H as a semiconductor layer of TFTs. Therefore, poly-Si has gained increasing interest and has been investigated by many researchers. Recnetly, fabrication of such poly-Si TFT-LCD panels with VGA pixel size and monolithic drivers has been reported, . Especially, fabricating poly-Si TFTs at a temperature mach lower than the strain point of glass is needed in order to have high mobility TFTs on large-size glass substrate, and the monolithic drivers will reduce the cost of TFT-LCDs. The conventional methods to fabricate poly-Si films are low pressure chemical vapor deposition (LPCVD0 as well as solid phase crystallization (SPC), pulsed rapid thermal annealing(PRTA), and eximer laser annealing (ELA). However, these methods have some disadvantages such as high deposition temperature over $600^{\circ}C$, small grain size (<50nm), poor crystallinity, and high grain boundary states. Therefore the low temperature and large area processes using a cheap glass substrate are impossible because of high temperature process. In this study, therefore, we have deposited poly-Si thin films on si(100) and glass substrates at growth temperature of below 40$0^{\circ}C$ using newly developed high rate magnetron sputtering method. To improve the sputtering yield and the growth rate, a high power (10~30 W/cm2) sputtering source with unbalanced magnetron and Si ion extraction grid was designed and constructed based on the results of computer simulation. The maximum deposition rate could be reached to be 0.35$\mu$m/min due to a high ion bombardment. This is 5 times higher than that of conventional sputtering method, and the sputtering yield was also increased up to 80%. The best film was obtained on Si(100) using Si ion extraction grid under 9.0$\times$10-3Torr of working pressure and 11 W/cm2 of the target power density. The electron mobility of the poly-si film grown on Si(100) at 40$0^{\circ}C$ with ion extraction grid shows 96 cm2/V sec. During sputtering, moreover, the characteristics of si source were also analyzed with in situ Langmuir probe method and optical emission spectroscopy.

• Progress in Superconductivity and Cryogenics
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• v.13 no.1
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• pp.1-5
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• 2011

[ $CeO_2$ ]has been widely used for single buffer layer of coated conductor because of superior chemical and structural compatibility with $ReBa_2Cu_3O_{7-{\delta}}$(Re=Y, Nd, Sm, Gd, Dy, Ho, etc.). But, the surface of $CeO_2$ layer showed cracks because of the large difference in thermal expansion coefficient between metal substrate and deposited $CeO_2$ layer, when thickness of $CeO_2$ layer exceeds 100 nm on the biaxially textured Ni-3%W substrate. The deposition rate has been limited to be less than 6 $\AA$/sec in order to get a good epitaxy. In this research, we deposited $CeO_2$ single buffer layers on biaxially textured Ni-3%W substrate with 2-step process such as thin nucleation layer(>10 nm) with low deposition rate(3 $\AA$/sec) and thick homo epitaxial layer(>240 nm) with high deposition rate(30 $\AA$/sec). Effect of deposition temperature on degree of texture development was tested. Thick homo epitaxial $CeO_2$ layer with good texture without crack was obtained at $600^{\circ}C$, which has ${\Delta}{\phi}$ value of $6.2^{\circ}$, ${\Delta}{\omega}$ value of $4.3^{\circ}$ and average surface roughness(Ra) of 7.2 nm within $10{\mu}m{\times}10{\mu}m$ area. This result shows the possibility of preparing advanced Ni substrate with simplified architecture of single $CeO_2$ layer for low cost coated conductor.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.25 no.5
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• pp.182-187
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• 2015

The growth and characterization of micro sized AlGaN array structures selectively grown by metal organic chemical vapor deposition (MOCVD) on GaN stripes are reported. The shape of the AlGaN array structures depends on the size of exposed area for selective growth. The AlGaN array structures grown selectively on relatively large exposed area have regular shapes resembling those of the GaN stripes on the substrate, while samples selectively grown on relatively small exposed area have irregular shapes. The phonon frequency of the AlGaN array structures increases with increasing Al composition in the AlGaN structure. However, at relatively high Al composition (x = 0.28 in this research), the phonon frequency decreases slightly from the expected value not only because of large tensile strain associated with large differences between the lattice constants of the AlGaN structure and underlying GaN stripes but also changes of crystal facet direction during the selective growth.

• 한국정보디스플레이학회:학술대회논문집
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• 2008.10a
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• pp.107-108
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• 2008

The spectacular development of AMLCDs, been made possible by a-Si:H technology, still faces two major drawbacks due to the intrinsic structure of a-Si:H, namely a low mobility and most important a shift of the transfer characteristics of the TFTs when submitted to bias stress. This has lead to strong research in the crystallization of a-Si:H films by laser and furnace annealing to produce polycrystalline silicon TFTs. While these devices show improved mobility and stability, they suffer from uniformity over large areas and increased cost. In the last decade we have focused on microcrystalline silicon (${\mu}c$-Si:H) for bottom gate TFTs, which can hopefully meet all the requirements for mass production of large area AMOLED displays [1,2]. In this presentation we will focus on the transfer of a deposition process based on the use of $SiF_4$-Ar-$H_2$ mixtures from a small area research laboratory reactor into an industrial gen 1 AKT reactor. We will first discuss on the optimization of the process conditions leading to fully crystallized films without any amorphous incubation layer, suitable for bottom gate TFTS, as well as on the use of plasma diagnostics to increase the deposition rate up to 0.5 nm/s [3]. The use of silicon nanocrystals appears as an elegant way to circumvent the opposite requirements of a high deposition rate and a fully crystallized interface [4]. The optimized process conditions are transferred to large area substrates in an industrial environment, on which some process adjustment was required to reproduce the material properties achieved in the laboratory scale reactor. For optimized process conditions, the homogeneity of the optical and electronic properties of the ${\mu}c$-Si:H films deposited on $300{\times}400\;mm$ substrates was checked by a set of complementary techniques. Spectroscopic ellipsometry, Raman spectroscopy, dark conductivity, time resolved microwave conductivity and hydrogen evolution measurements allowed demonstrating an excellent homogeneity in the structure and transport properties of the films. On the basis of these results, optimized process conditions were applied to TFTs, for which both bottom gate and top gate structures were studied aiming to achieve characteristics suitable for driving AMOLED displays. Results on the homogeneity of the TFT characteristics over the large area substrates and stability will be presented, as well as their application as a backplane for an AMOLED display.