• 한국정보디스플레이학회:학술대회논문집
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• 2007.08a
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• pp.833-836
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• 2007

A low power and small area source driver using LTPS TFTs is proposed for mobile applications. This source driver adopts level shifter with holding latch function and new R-to-R type digital-to-analog converter (DAC). The power consumption and layout area of the proposed source driver are reduced by 23% and 25% for 16M colors and qVGA AM-OLED panel, respectively.

• 한국정보디스플레이학회:학술대회논문집
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• 2007.08a
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• pp.829-832
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• 2007

A high-speed and accurate analog buffer is proposed for mobile display using LTPS TFTs. The proposed analog buffer is common source type with sampling and negative feedback mode. Therefore, driving speed of the proposed buffer is faster than previously reported one. In addition, the accuracy is very high because of high negative feedback gain. The simulation results show that maximum mischarging voltage of the proposed buffer is 8mV and previously reported one is 37mV. And Power consumption of the proposed buffer is $43.1{\mu}W$, which is 73% of previously reported one.

• 한국정보디스플레이학회:학술대회논문집
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• 2008.10a
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• pp.696-699
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• 2008

A 10-bit source driver using low temperature poly-silicon(LTPS) TFTs is developed. To reduce the DAC area, the DAC structure including two 5-bit resistor-string DACs and analog buffer, which has analog adder is proposed. The source driver is fabricated using LTPS process and its one channel area is $3,200{\mu}m\;{\times}\;260{\mu}m$. The simulated INL and DNL of output voltages are less than 3 LSB and 1 LSB, respectively.

• 한국정보디스플레이학회:학술대회논문집
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• 2003.07a
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• pp.622-625
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• 2003

The dependence of stress-induced leakage current on LTPS TFTs was characterized in this study. The impacts of poly-Si crystallization, gate insulator, impurity activation, hydrogenation process and electrostatic discharge damage were investigated. It was observed more TFTs instable characteristic under those process-assisted processes. According to the LTPS roadmap, smaller geometric and low temperature process were the future trend and the stress-induced leakage current should be worthy of remark.

• Journal of the Semiconductor & Display Technology
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• v.22 no.4
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• pp.179-184
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• 2023

We propose the modeling methodology of CMOS inverter made of LTPO TFT using a machine learning. LTPO can achieve advantages of LTPS TFT with high electron mobility as a driving TFT and IGZO TFT with low off-current as a switching TFT. However, since the unified model of both LTPS and IGZO TFTs is still lacking, it is necessary to develop a SPICE-compatible compact model to simulate the LTPO current-voltage characteristics. In this work, a generic framework for combining the existing formula of I-V characteristics with artificial neural network is presented. The weight and bias values of ANN for LTPS and IGZO TFTs is obtained and implemented into PSPICE circuit simulator to predict CMOS inverter. This methodology enables efficient modeling for predicting LTPO TFT circuit characteristics.

• 한국정보디스플레이학회:학술대회논문집
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• 2007.08b
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• pp.1340-1343
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• 2007

We have simultaneously fabricated LTPS TFTs and integrated photodiodes on the same glass substrates without any additional LTPS process. The structure of an integrated photodiode is a lateral p-i-n diode with a gate. The performances of a photodiode were improved at a negative gate voltage.

• 한국정보디스플레이학회:학술대회논문집
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• 2005.07a
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• pp.303-306
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• 2005

We report the self-aligned low temperature poly silicon (LTPS) TFT process using simple doping process. In conventional LTPS-TFT, the Lightly Doped Drain (LDD) doping and source/drain doping are processed separately by aligning the gate with the source and drain during the gate lithography step. This ne w process not only fabricates fully self-aligned low temperature poly silicon TFTs with symmetric LDD structure but also simplifies the process flow with combined source/drain doping and LDD doping in one step. LDD doping process can be achieved using only source/drain doping process according to the new structure. In this paper, the TFT characteristics of NMOS and PMOS using the new doping process will be discussed.

• 한국정보디스플레이학회:학술대회논문집
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• 2008.10a
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• pp.205-207
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• 2008

The new process for hybrid silicon thin film transistor (TFT) using DPSS laser has been developed for realizing both low-temperature poly-Si (LTPS) TFT and a-Si:H TFT on the same substrate as a backplane of active matrix liquid crystal display. LTPS TFTs are integrated on the peripheral area of the panel for gate driver integrated circuit and a-Si:H TFTs are used as a switching device for pixel in the active area. The technology has been developed based on the current a-Si:H TFT fabrication process without introducing ion-doping and activation process and the field effect mobility of $4{\sim}5\;cm^2/V{\cdot}s$ and $0.5\;cm^2/V{\cdot}s$ for each TFT was obtained. The low power consumption, high reliability, and low photosensitivity are realized compared with amorphous silicon gate driver circuit and are demonstrated on the 14.1 inch WXGA+ ($1440{\times}900$) LCD Panel.

• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.747-750
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• 2005

In this paper, we propose a new level shifter circuit for reducing power consumption. The concept of the proposed level shifter is to use capacitive coupling effect to reduce short circuit current. The power consumption of the proposed level shifter is reduced up to 50%, compared to the conventional level shifter. Especially the proposed level shifter circuit works well with low temperature poly-Si (LTPS) TFTs. It can operate on low input voltage even with low-mobility, high and widely-varying threshold voltage of LTPS TFT.

• 한국정보디스플레이학회:학술대회논문집
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• 2006.08a
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• pp.403-408
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• 2006

We have developed a four mask LTPS TFT p-channel process and fabricated active matrix backplanes based on a pixel circuit with three TFTs and one storage capacitor. Top emitting AMOLED displays have been produced to prove the working principle of the active matrix.