• Title/Summary/Keyword: LNA(Low Noise Amplifier)

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A High Linearity Low Noise Amplifier Using Modified Cascode Structure (높은 선형성을 갖는 새로운 구조의 MMIC 저잡음 증폭기)

  • Park, Seung Pyo;Eu, Kyoung Jun;No, Seung Chang;Lee, Moon-Que
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.27 no.2
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    • pp.220-223
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    • 2016
  • This letter proposes a low noise amplifier which has low noise figure and high linearity simultaneously using a cascode structure with an additional transistor. The proposed structure minimizes the noise source by using optimizing transistor sizes and also improves linearity from the current bleeding technique. The device was fabricated in a $0.5{\mu}m$ GaAs pHEMT process and has noise figure of 1.1 dB, a voltage gain of 15.0 dB, an $OIP_3$ of 30.8 dBm and an input/output return loss of 11.6 dB/10.4 dB from 1.8 to 2.6 GHz.

Input Balun Design Method for CMOS Differential LNA (차동 저 잡음 증폭기의 입력 발룬 설계 최적화 기법)

  • Yoon, Jae-Hyuk
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.28 no.5
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    • pp.366-372
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    • 2017
  • In this paper, the analysis of baluns that are inevitably required to design a differential low noise amplifier, The balun converts a single signal input from the antenna into a differential signal, which serves as an input to the differential amplifier. In addition, it protects the circuit from ESD(Electrostatic Discharge) coming through the antenna and helps with input matching. However, in the case of a passive balun used in general, since the AC signal is transmitted through electromagnetic coupling formed between two metal lines, it not only has loss without gain but also has the greatest influence on the total noise figure of the receiving end. Therefore, the design of a balun in a low-noise amplifier is very important, and it is important to design a balun in consideration of line width, line spacing, winding, radius, and layout symmetry that are necessary. In this paper, the factors to be considered for improving the quality factor of balun are summarized, and the tendency of variation of resistance, inductance, and capacitance of the balun according to design element change is analyzed. Based on the analysis results, it is proved that the design of input balun allows the design of low noise, high gain differential amplifier with gain of 24 dB and noise figure of 2.51 dB.

RF front-end Module for On-Line UHF Partial-discharge Monitoring System

  • Lee June Young;Kim Bok Ki
    • Proceedings of the IEEK Conference
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    • 2004.08c
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    • pp.776-779
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    • 2004
  • A RF front-end module is designed for GIS(Gas Insulated Substation) which is employed for effective and efficient very high voltage transmission. Major advantage of the unit is improved PO detection sensitivity through minimizing the effect of surrounding interference signals, which is achieved by controlling the gain and the selection of the frequency band, for the precise detection of any UHF PO (Partial Discharge) disturbance occurred in the GIS due to some unwanted problems. For the development of the module, various switches for providing selected signal paths, wideband LNA, 3 BPF for selecting detection frequency band, and video detector are designed, fabricated and measured on 1 mm FR4 substrate with various RF components. The detection sensitivity of the unit was <-60 dBm that is sufficient to detect UHF PO signals as low as 1 pC. It is believed that the value is enough to detect the signal occurred in GIS.

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Design and Implementation of Broadband Low Noise Amplifier for Satellite Broadcasting Receiver (위성방송 수신용 광대역 저잡음 증폭기 설계 및 구현)

  • 이원규;양운근;윤광욱;박정우
    • Proceedings of the Korea Electromagnetic Engineering Society Conference
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    • 2002.11a
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    • pp.209-212
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    • 2002
  • 본 논문에서는 위성방송 수신용 광대역 저잡음 증폭기를 설계 및 구현하였다. 전산모의 실험용 소프트웨어를 사용하여 저잡음 증폭기를 설계하였고, 제작된 저잡음 증폭기의 전기적 특성을 네트워크 분석기와 Noise Figure 분석기를 사용하여 측정하였다. LNA단의 Noise Figure에 중점을 두고 샘플을 제작하여 측정한 길과 전산모의실험에서 나온 데이터는 0.46㏈이하였고 전체 시스템에서 측정된 Noise figure는 0.6㏈정도의 좋은 길과를 나타내었지만, 반면에 이득과 반사손실의 결과가 약간 떨어짐을 보였다 위성 인터넷 등 위성을 이용하는 통신 인구의 급격한 증가와 더불어 구현된 저잡음 증폭기를 사용한 LNB(Low Noise Block down converter)가 널리 응용될 것으로 기대된다.

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Implementation of a CMOS FM RX front-end with an automatic tunable input matching network (자동 변환 임피던스 매칭 네트워크를 갖는 CMOS FM 수신기 프론트엔드 구현)

  • Kim, Yeon-Bo;Moon, Hyunwon
    • Journal of Korea Society of Industrial Information Systems
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    • v.19 no.4
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    • pp.17-24
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    • 2014
  • In this paper, we propose a CMOS FM RX front-end structure with an automatic tunable input matching network and implement it using a 65nm CMOS technology. The proposed FM RX front-end is designed to change the resonance frequency of the input matching network at the low noise amplifier (LNA) according to the channel frequency selected by a phase-locked loop (PLL) for maintaining almost constant sensitivity level when an embedded antenna type with high frequency selectivity characteristic is used for FM receiver. The simulation results of implemented FM front-end show about 38dB of voltage gain, below 2.5dB of noise figure, and -15.5dBm of input referred intercept point (IIP3) respectively, while drawing only 3.5mA from 1.8V supply voltage including an LO buffer.

Ka-band CMOS 2-Channel Image-Reject Receiver (Ka-대역 CMOS 2채널 이미지 제거 수신기)

  • Dongju Lee;Se-Hwan An;Ji-Han Joo;Jun-Beom Kwon;Younghoon Kim;Sanghun Lee
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.23 no.5
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    • pp.109-114
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    • 2023
  • In this paper, a 2-channel Image-Reject receiver using a 65-nm CMOS process is presented for Ka-band compact radars. The designed receiver consists of Low-Noise Amplifier (LNA), IQ mixer, and Analog Baseband (ABB). ABB includes a complex filter in order to suppress unwanted images, and the variable gain amplifiers (VGAs) in RF block and ABB have gain tuning range from 4.5-56 dB for wide dynamic range. The gain of the receiver is controlled by on-chip SPI controllers. The receiver has noise figure of <15 dB, OP1dB of >4 dBm, image rejection ratio of >30 dB, and channel isolation of >45 dB at the voltage gain of 36 dB, in the Ka-band target frequency. The receiver consumes 420 mA at 1.2 V supply with die area of 4000×1600 ㎛.

Design Considerations of K-band Front-End Module for Dynamic Range (Dynamic Range를 고려한 K-band Front-End Module 설계)

  • Han, Geon-Hee;Jang, Youn-Gil;Rhee, Young-Chul
    • The Journal of the Korea institute of electronic communication sciences
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    • v.7 no.1
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    • pp.15-20
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    • 2012
  • In this paper, we designed and analysed K-band front-end module for digital microwave communication system receiver which improvement of dynamic range. We also suggested method of minimum amplified input signal level used to minimize noise figure of low-noise amplifier for High dynamic range. The designed modules consist of active mixer with conversions gain and PL-DRO with high stability and quality factor. The designed modules performance is that has the characteristics of over 54dB conversion gain, 1.3dB noise figure.

Development of an Imaging Radiometer System at W-band (W 대역 영상라디오미터 시스템 개발)

  • Jung, Min-Kyoo
    • Journal of the Korea Institute of Military Science and Technology
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    • v.13 no.6
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    • pp.1133-1138
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    • 2010
  • We have developed an imaging radiometer system at W-band. The system consists of lens, reflector, 30-ch receiver array, scanner, and signal processor. One receiver consists of a dielectric rod antenna, a balun, LNA(low noise amplifier) and a detector. The system configuration requirements are described. Finally, we represent radiometer images to obtain through clouds, smoke, dust, and other obstructions which render visible and IR systems ineffective.

Testable Design of RF-ICs using BIST Technique (BIST 기법을 이용한 RF 집적회로의 테스트용이화 설계)

  • Kim, Yong;Lee, Jae-Min
    • Journal of Digital Contents Society
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    • v.13 no.4
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    • pp.491-500
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    • 2012
  • In this paper, a new loopback BIST structure which is effective to test RF transceiver chip and LNA(Low Noise Amplifier) in the chip is presented. Because the presented BIST structure uses a baseband processor in the chip as a tester while the system is under testing mode, the developed test technique has an advantage of performing test application and test evaluation in effectiveness. The presented BIST structure can change high frequency test output signals to a low frequency signals which can make the CUT(circuits under test) tested easily. By using this technique, the necessity of RF test equipment can be mostly reduced. The test time and test cost of RF circuits can be cut down by using proposed BIST structure, and finally the total chip manufacturing costs can be reduced.