• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.4
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• pp.36-42
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• 2008

40Gb/s CMOS Clock and Data Recovery circuit design for optical serial link is proposed. The circuit generates 8 multiphase clock using LC tank PLL and controls the phase between the clock and the data using the $2{\times}$ oversampling Bang-Bang PD. 40Gb/s input data is 1:4 demultiplexed and recovered to 4 channel 10Gb/s outputs. The design was progressed to separate the analog power and the digital power. The area of the chip is $2.8{\times}2.4mm^2$ for the inductors and the power dissipation is about 200mW. The chip has been fabricated using 0.18um CMOS process. The measured results show that the chip recovers the data up to 9.5Gb/s per channel(Equivalent to serial input rate of up to 38Gb/s).

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.22 no.9
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• pp.904-911
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• 2011

This paper deals with transmission characteristics of a new dual resonant structure for designing waveguide band-pass filter. The structure which has a pass-band between two adjacent stop-bands in a single body consists of circular ridged aperture and four armed conducting patch. The dual resonant behavior of the structure can be represented by a combination of LC series and parallel resonant circuits. Also these resonant properties can be easily controlled by varying the geometry of the aperture and four armed conducting patch. Actually, the structure is fabricated on the microstrip substrate by use of etching technique so that it is formed an iris type resonator which can be easily put into the transverse plane of the waveguide. We use WR-90 standard waveguide, adapters, and VNA(vector network analyzer) to measure the resonant characteristics of the structure. It is very useful to design and to improve the cutoff skirts characteristics in the waveguide band-pass filter design area.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.23 no.4
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• pp.59-64
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• 2023

In this paper, It is proposed through the empirical design of a Conducted EMI filter for noise reduction of power used in electronic devices. For the proposed structure, A-type, B-type, C-type, and D-type structures were designed, and conductive noise reduction was confirmed by using an LC network with various X-capacitors, Y-capacitors, and Air-inductors. 10 [μH] was used for L1 and L2, and 4.7 [nF] was used for C1 and C2. L3 for common mode used 13[μH], and C5, C6, C7 were designed using 10[nF]. The measured insertion loss values of the designed EMI filter were -74.4[dB] at 3.2MHz, -75.4[dB] at 4MHz, and -75.3[dB] at 13.56MHz. Therefore, the proposed EMI filter will be able to reduce power supply noise used in various electronic devices.

• Journal of the Institute of Convergence Signal Processing
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• v.4 no.1
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• pp.41-48
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• 2003

In this paper, a new equivalent circuit for a defected ground structure(DGS) is proposed and adapted to design of a power amplifier for performance improvement. The DGS equivalent circuit presented in this paper consists of parallel LC resonator and parallel capacitance to describe the fringing fields due to the etched defects on the metallic ground plane, and also is used to optimize the matching circuit of a power amplifier. A previous research has also used a DGS for harmonic rejection and efficiency improvement of a power amplifier(1), however, there was no exact equivalent circuit analysis. In this paper, we suggest a novel design method and show the performance improvement of a class AB power amplifier by using the equivalent circuit of a DGS applied to output matching circuit. The design method presented in this paper can provide very accurate design results to satisfy the optimum load condition and the desirable harmonic rejection, simultaneously. As a design example, we have designed a 20W power amplifier with and without circuit simulation of DGS, and compared the measurement results.

• Asian-Australasian Journal of Animal Sciences
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• v.27 no.5
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• pp.667-673
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• 2014

Eight multiparous Holstein cows ($632{\pm}12$ kg BW; $135{\pm}16$ DIM) were used in a replicated $4{\times}4$ Latin square design to evaluate the effects of forage sources on rumen fermentation characteristics, performance, and microbial protein (MCP) synthesis. The forage portion of the diets contained alfalfa hay (AH), oat hay (OH), Leymus chinensis (LC), or rice straw (RS) as the primary source of fiber. Diets were isonitrogenous and isocaloric, and cows were fed four corn silages based total mixed rations with equivalent nonfiber carbohydrate (NFC) and forage neutral detergent fiber (NDF). Dry matter intake was not affected by the source of dietary forages, ranging from 18.83 to 19.20 kg/d, consequently, milk yield was similar among diets. Because of the numerical differences in milk fat and milk protein concentrations, 4% FCM and ECM yields were unchanged (p>0.05). Mean rumen pH, NH3-N content, and concentrations of volatile fatty acids in the rumen fluid were not affected by the treatments (p>0.05). Dietary treatments did not affect the total tract apparent digestibility of dry matter, organic matter, and crude protein (p>0.05); however, digestibility of NDF and acid detergent fiber in RS diet was higher compared with AH, OH, and LC diets (p<0.05). Total purine derivative excretion was higher in cows fed AH, OH, and LC diets compared with those fed RS diet (p<0.05), consequently, estimated MCP synthesis was 124.35 g/d higher in cows fed AH diet compared with those fed RS diet (p<0.05). The results indicated that cows fed AH, OH, LC, and RS diets with an equivalent forage NDF and NFC have no unfavourable effect on the ruminal fermentation and productive parameters.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.9 s.351
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• pp.17-22
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• 2006

CMOS LC VCO with fast response adaptive frequency calibration (AFC) technique for IEEE 802.11a/b/g WLANs is designed in 1.8V $0.18{\mu}m$ CMOS process. The possible operation is verified for 5.8GHz band, 5.2GHz band, and 2.4GHz band using the switchable L-C resonators. To linearize its frequency-voltage gain (Kvco), optimized multiple MOS varactor biasing tecknique is used. In order to operate in each band frequency range with reduced VCO gain, 4-bit digitally controlled switched- capacitor bank is used and a wide-range digital logic quadricorrelator (WDLQ) is implemented for fast frequency detector.

• Journal of Aquaculture
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• v.18 no.3
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• pp.180-188
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• 2005

The separation performances for thirty different dimensions of a low-pressure hydrocyclone (LPH) were tested in order to obtain an optimum dimension scale for fecal solid removal from an aquaculture system. The geometric variables were considered on two inlet diameters (Di: 30 and 50 mm), five overflow diameters (Do: 30, 50, 60, 70 and 100 mm), and three cylinder lengths (Lc: 250, 345 and 442 mm), while the cylinder diameter (Dc) of 335 mm, underflow diameter (Du) of 50 mm and cone angle (${\theta}$) of $68^{\circ}$ were kept constant. A small size for carp feces was regarded as the target for the removal of solids. Spherical polystyrene particles (1.1-1.3 mm dia., ${\rho}_s=1.05g/cm^3$), which demonstrate a similar settling velocity and specific gravity to the carp feces, were used as feed. The separation performance was tested in the range of 330 to 1200 ml/s of the inflow rate. Experimental results using ANCOVA and the Tukey test (${\alpha}=0.05$) demonstrated that the separation performances of LPH were significantly affected (P<0.05) by fi, Di and Do. In contrast, there was no significant Lc effect (P>0.05) on the separation performances. The maximum separation performance was detected at dimension combinations of 30 mm of inflow diameter (Di), 50, 60 and 70 mm of overflow diameter (Do), 345 mm of cylinder length (Lc). The dimension proportions were 0.09, 1.03, 0.15-0.21 and 0.15 (or Di/Dc, Lc/Dc, Do/Dc and Du/Dc, respectively.

• Korean Journal of Clinical Pharmacy
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• v.16 no.1
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• pp.63-68
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• 2006

Gabapentin, 1-(aminomethyl-1-cyclohexyl)acetic acid, is anew antiepileptic drug related to ${\gamma}-aminobutyric$ acid(GABA) currently being introduced in therapy worldwide. The bioavailability and pharmacokinetics of gabapentin capsules were examined in 22 volunteers who received a single oral dose in the fasting state by randomized balanced $2{\times}2$ crossover design. After dosing, blood samples were collected for a period of 24 hours and analyzed by liquid chromatography-tandem mass spectrometry (LC/MS/MS). Time course of plasma gabapentin concentration was analyzed with non-compartmental and compartmental approaches. $WinNonlin^{(R)}$, the kinetic computer program, was used for compartmental analysis. One compartment model with first-order input, first-order output with no lag time and weighting by $1/(predieted\;y)^2$ was chosen as the most appropriate pharmacokinetic model for the volunteers. The major pharmacokinetic parameters $(AUC_{0-24hr},\;AUC_{inf},\;C_{max}\;and\;T_{max})$ and other parameters $(K_a,\;K_{el},\;V_d/F\;and\;Cl/F)$ of $Gapentin^{TM}$ (test drug) and $Neurontin^{TM}$ (reference drug) were estimated by non-compartmental analysis and compartmental analysis. The 90% confidence intervals of mean difference of logarithmic transformed $AUC_{0-24hr}\;and\;C_{max}$ were $log(0.9106){\sim}log(1.l254)\;and\;log(0.8521){\sim}log(1.0505)$, respectively. It shows that the bioavailability of the test drug is equivalent with that of the reference drug. There was no statistically significant difference between the two drugs in all pharmacokinetic parameters.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.6 s.336
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• pp.59-66
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• 2005

CMOS LC VCO for tri-bind wireless LAN applications was designed in 1.8V 0.18$\mu$m CMOS process. PMOS transistors were chosen for VCO core to reduce flicker noise. The possible operation was verified for 5.8GHz band (5.725$\~$5.825GHz), 5.2GHz band (5.150$\~$5.325GHz), and 2.4GHz band (2.412$\~$2.484GHz) using the switchable L-C resonators. To linearize its frequency-voltage gain (Kvco), optimized multiple MOS varactor biasing technique was used for capacitance linearization and PLL stability improvement. VCO core consumed 2mA current and $570{\mu}m{\times}600{\mu}m$ die area. The phase noise was lower than -110dBc/Hz at 1MHz offset for tri-band frequencies.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.8
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• pp.598-609
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• 2003

This paper describes a CMOS IF PLL frequency synthesizer. The designed frequency synthesizer can be programmed to operate at various intermediate frequencies using different external LC-tanks. The VCO with automatic amplitude control provides constant output power independent of the Q-factor of the external LC-tank. The designed frequency divider includes an 8/9 or 16/17 dual-modulus prescaler and can be programmed to operate at different frequencies by external serial data for various applications. The designed circuit is fabricated using a 0.35${\mu}{\textrm}{m}$ n-well CMOS process. Measurement results show that the phase noise is 114dBc/Hz@100kHz and the lock time is less than 300$mutextrm{s}$. It consumes 16mW from 3V supply. The die area is 730${\mu}{\textrm}{m}$$\times$950${\mu}{\textrm}{m}$.