• Title/Summary/Keyword: LC circuit

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Homogeneous Aligned Single Gap Transflective Display driven by Fring-field using a Liquid Crystal with Positive Dielectic Anisotropy (유전율 이방성이 양인액정을 이용한 Fringe-Field 구동형 수평배향된 단일갭 반투과형 디스플레이)

  • Lim, Young-Jin;Choi, Min-Oh;Lee, Seung-Hee
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2005.05a
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    • pp.54-57
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    • 2005
  • We have designed a single gap transflective liquid crystal display (LCD) driven by a fringe electric field, in which the +LC (${\Delta}{\varepsilon}$=7.4, rubbing angle= $80^{\circ}$) is homogeneously aligned in the initial state. This device is a problem that the voltage-dependent transmittance and reflectance curves do not match each other. Thus a dual driving circuit is required. This study shows that optimization of the rubbing angle in the transmissive and reflective regions solves this problem so that the transflective display with a single cell gap and single gamma curve for reflective and transmissive region is possible.

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A Study on High Frequency Resonant Type X-ray Generator (고주파 공진형 방식 X-선 발생장치에 관한 연구)

  • Yoo, Dong-Wook;Ha, Sung-Woon;Baek, Joo-Won;Kim, Jong-Soo;Kim, Hack-Seong;Won, Chung-Yuen
    • Proceedings of the KIEE Conference
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    • 1995.07a
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    • pp.209-211
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    • 1995
  • This paper is concerned with High Frequency, High Voltage Generator for X-ray using zero-voltage soft-switching PWM DC-DC high-power converter by Resonant method, which makes the most of the parastic LC parameters of high-voltage transformer link, for diagnostic X-ray power generator. The converter circuit basically utilizes phase-shift pulse width modulated series Resonant full-bridge PWM DC-DC high-power converter operating at a constant frequency;25kHz. The converter output regulation is digitally controlled using DSP (Digital Signal Processor) for obtaining a fast rising time and adjust output voltage within a wide load range.

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Optimum Gain Distribution of the Ampilfiers in High Power YLF($Nd^{3+}$)-Phosphate Glass($Nd^{3+}$) Laser System

  • CHi, Kyeong-Koo
    • Proceedings of the Optical Society of Korea Conference
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    • 1989.02a
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    • pp.20-25
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    • 1989
  • The nonlinear, time dependent photon transport equations of Frantz and Nodvik, which describe the amplification of an optical pulse in an active medium, are modified to a simpler equation which describes only the amplification of energy. with this equation, the output energy of the high power YLF(Nd3+)-Phosphate Glass(Nd3+) Laser System is calculated. When the stored energy density Est is 0.10J/㎤, 0.16J/㎤, 0.228J/㎤, and 0.50J/㎤, and with the assumption of uniform population inversion density, the final output energy of this laser system is 5.38J, 176J, 317J, and 283J, respectively. The gain saturation causes distortion of the output beam. This phenomenon is described in detail at the first three rod amplifier systems in the case of E=0.228J/㎤. The peak current and decay time constant of the flashlamps, which are used to obtain population inversion in the active medium, are investigated. The flashlamp driving circuit which has optimum operational performance should have {{{{ SQRT { LC} }} time about 100$\mu$sec.

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Implementation of Wideband SSM with Excellent Sideband and Carrier Suppression (우수한 측파대 및 반송파 억압을 갖는 광대역 단측파대 믹서의 구현)

  • Kim, In-Seon;Park, Young-Ju;Kim, Jang-Pyo;Jeon, Jeong-Il;Kim, Moo-Hoi
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.22 no.12
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    • pp.1097-1106
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    • 2011
  • In this paper, we present design method of wideband single-sideband mixer(SSM) with excellent sideband suppression and carrier suppression. We proposed SSM with 4-band split structure for uniform output flatness. From circuit simulation of this structure using Microwave OfficeTM, we got satisfactory results. We realized a SSM based on this results, then we experimented. The measured results show excellent agreements with the simulated results. We compared with two SSM's(target SSM(M Co. SM0218LC1CDC SSM) and our SSM) as well. The presented SSM is 3.35 times bigger, but sideband suppression is 3 dBc better and carrier suppression is 8 dBc better than those of comparative SSM, respectively.

Design of a Low Power Capacitor Cross-Coupled Common-Gate Low Noise Amplifier (캐패시터 크로스 커플링 방법을 이용한 5.2 GHz 대역에서의 저전력 저잡음 증폭기 설계)

  • Shim, Jae-Min;Jeong, Ji-Chai
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.23 no.3
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    • pp.361-366
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    • 2012
  • This paper proposes a low power capacitor cross-coupled 5.2 GHz band low noise amplifier(LNA) using the current-reused topology with the TSMC 0.18 ${\mu}m$ CMOS process. The proposed 5.2 GHz band LNA uses a capacitor cross-coupled $g_m$-boosting method for reducing current flow of circuit and a current-reused topology to decrease total power dissipation. The parallel LC networks are used to reduce size of spiral inductors. The simulation results show high gain of 17.4 dB and noise figure(NF) of 2.7 dB for 5.2 GHz.

A Study on the Voltage Control of a Single Phase Full-bridge Inverter using SPWM Driving Method (SPWM 구동 방식을 이용한 단상 풀 브리지 인버터의 전압 제어에 대한 연구)

  • Ko, Yun-Seok
    • The Journal of the Korea institute of electronic communication sciences
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    • v.12 no.5
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    • pp.851-858
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    • 2017
  • In this study, the voltage control system of a single phase full bridge inverter was designed based on the SPWM driving method. The voltage control system consists of a single-phase full-bridge inverter, a PI controller for linearly compensating the error between the reference voltage and the output voltage, a PWM driving circuit for generating the gate signal using the SPWM method from the controller signal, and an LC filter for filtering the inverter output voltage waveform into sinusoidal waveform. Finally, the voltage control system of a single-phase full-bridge inverter based on the PWM driving method was modeled using EMTP-RV and by showing that the output voltage accurately converges the reference voltage through several simulation examples, the validity of the control system design was verified.

Implementation of An Water-Cooled High Power Amplifier for Particle Accelerator (입자 가속기용 수냉식 고전력 증폭기 구현)

  • Yoon, Young-Chul;Kim, Young
    • Journal of Advanced Navigation Technology
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    • v.21 no.1
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    • pp.66-71
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    • 2017
  • This paper describes implementation of a 165 MHz, 5 kW RF high power amplifier (HPA) for particle accelerator applications. The HPA consists of a drive amplifier for main amplifiers driving, sixteen 600 W class-AB push-pull power amplifier pallets and Wilkinson power divider/combiner using lumped LC components, which are divided/combined power amplifier pallet outputs. To detected the amplifier circuit of normal and reflected output power conditions, we used a bidirectional coupler. To radiate heat of main power amplifier, we were used an water-cooled copper plates to go through a water for radiation of heat. The HPA of center frequency 165 MHz has archived an efficiency of 62.5 % at 5 kW of power level experimentally.

A study on Optimal Design for the Inductance and Coreloss of Plate Type Induction Heater for Electric Vehicle (전기자동차용 판형 인덕션 히터의 인덕턴스 및 철손 최적설계 연구)

  • Kang, Jun-Kyu;Jo, Byoung-Wook;Kim, Ki-Chan
    • The Journal of the Korea Contents Association
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    • v.18 no.10
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    • pp.425-430
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    • 2018
  • The battery system of an electric vehicle suffers from the problem the battery output and the service life decrease at low temperature. A Positive Temperature Coefficient(PTC) heater is used for maintaining room temperature but is heavy due to a complicated insulation structure. The larger the weight is, the lower the fuel economy of the electric vehicle is. On the other hand a induction heater have a simple insulation structure, which is effective in weight reduction and has a rapid temperature rise. The induction heater consists of an LC resonance circuit. The larger the capacitance is, the higher the price and weight is. Therefore, the inductance should be increased to reduce the capacitance. Also, the main heat source of the induction heater is coreloss. So, it is important to optimize inductance and coreloss in terms of electromagnetic field design. In this paper, the inductance and the coreloss according to the change of the induction heater structure were optimized through the Taguchi method and Finite Element Method(FEM) simulation.

Development of Fully Integrated Broadband MMIC Chip Set Employing CSP(Chip Size Package) for K/Ka Band Applications (CSP(Chip Size Package)를 이용한 완전집적화 K/Ka 밴드 광대역 MMIC Chip Set 개발)

  • Yun Young
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.16 no.1 s.92
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    • pp.102-112
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    • 2005
  • In this work, we developed fully integrated broadband MMIC chip set employing CSP(Chip Size Package) for K/Ka band applications. By utilizing an ACF for the RF-CSP, the fabrication process for the packaged amplifier MMIC could be simplified and made cost effective. $STO(SrTi_{3})$ capacitors were employed to integrate the DC biasing components on the MMIC, and LC parallel circuits were employed for DC feed and ESD protection. A pre-matching technique and RC parallel circuit were used to achieve a broadband matching and good stability fer the amplifier MMIC in K/Ka band. The amplifier CSP MMIC exhibited good RF performance over a wide frequency range in K/Ka band. This work is the first report of a fully integrated CSP amplifier MMIC successfully operating in the K/Ka band.

A CMOS Intermediate-Frequency Transceiver IC for Wireless Local Loop (무선가입자망용 CMOS 중간주파수처리 집적회로)

  • 김종문;이재헌;송호준
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.24 no.8A
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    • pp.1252-1258
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    • 1999
  • This paper describes a COMS IF transceiver IC for 10-MHz bandwidth wireless local loops. It interfaces between the RF section and the digital MODEM section and performs the IF-to-baseband (Rx) and baseband-to-IF (Tx) frequency conversions. The chip incorporates variable gain amplifiers, phase-locked loops, low pass filters, analog-to-digital and digital-to-analog converters. It has been implemented in a 0.6 -${\mu}{\textrm}{m}$ 2-poly 3-metal CMOS process. The phase-locked loops include voltage-controlled oscillators, dividers, phase detectors, and charge pumps on chip. The only external complonents are the filter and the varactor-tuned LC tank circuit. The chip size is 4 mm $\times$ 4 mm and the total supply current is about 57 mA at 3.3 V.

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