• Journal of the Korea Institute of Building Construction
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• v.15 no.5
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• pp.473-481
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• 2015

The purpose of this research is to comprehend experimentally the characteristics of human strength for using as the basic data of impact resistance test method of lightweight wall. Human motions exerting static load are classified to 4 types. Pushes with two hands or shoulder are defined as the instantaneously forcing motions with hands or shoulder put on the force plate. Leanings back or one-hand against the wall are defined as motions of taking a rest in their respective comfortable posture. Human motions exerting dynamic load are classified to 3 types. Selecting 3 levels of motion strength (weak, middle, strong), 3 levels of force plate stiffness (A: 20kN/cm, B: 4.7kN/cm, C: 2.2kN/cm), and 30 male subjects, load was measured when they applied strength to the force plate. Results of this research are as follows: (1) The maximum load ratio (Pmax/W) of static load for each motion was 1.17-1.25 in two hands pushing, 0.95-0.99 in shoulder pushing, 0.16-0.18 in back leaning, and 0.12-0.15 in one hand leaning. (2) Human dynamic load and object collision were different in the load characteristics. (3) The maximum load ratio of dynamic load for each motion was 10.07 in heel kick, 4.46 in shoulder hitting, and 5.58 in fist blow.

• Korean Journal of Applied Biomechanics
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• v.15 no.3
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• pp.21-30
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• 2005

The purpose of this study is helps to make full use for perfect performance by grasping the defects of Tichonkich motion performed by athlete CSM For this, the study analyzed kinematical variables through Tichonkich motions performed at the first selection competition(1st trial) and final selection competition(2nd trial) for the dispatch to the 28th Athens Olympic Games using the three-dimensional cinematographical method with a high-speed video camera, and obtained the following results. 1. During Tichonkich motion, the execution time of up swing and the right hand moving to the left bar was shorter in the 2nd trial than the 1st one, while the execution time of down swing, the support of the left bar and the right hand moving to the right bar was longer in the 2nd trial than the 1st trial. 2. The horizontal position of COG in the 2nd trial was -35cm in the 1st stage, 42cm in the 3rd stage and 29cm in the 4th stage, that is, it showed a great swing focused on the circular movement compared to the 1st trial, while the vertical position of COG was -59cm in the 2nd stage, that is, it showed a small swing focused on a up and down movement. Also the 5th stage vertical position was 98cm, and the 6th stage vertical position was 95cm in the 2nd trial which were higher than those of the 1st trial, so it has provided magnificence required in the modern gymnastics. 3. And it was indicated that the horizontal velocity at the down swing phase proceeded forward more rapidly in the 2nd trial than that in the 1st trial, and the reverse ascent made a rapid vertical rise lessening left and right velocity change. And in the 5th stage, the 2nd trial was kept very slower in horizontal, vertical and left and right velocity that in the 1st trial, so it reached a handstand with leisurely movement. 4. In the 2nd trial, shoulder joint of the 1st, 2nd, 3rd stages kept a larger angle than that in the 1st trial, that is, it made a great swing while in the 1st trial, it showed a swing movement dependent on kick movement by the flexion and extension of hip joint. Also in the 2nd trial, the body formed a vertical posture with both hands supporting the left bar and hip joint was kept larger as $198^{\circ}$ and $190^{\circ}$ in the 5th and 6th stage than that in the 1st trial, so it made a handstand with the body uprightly stretched out, and magnificent and stable movement.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.5
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• pp.25-33
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• 2011

This work proposes a skinny-type 10b 50MS/s 0.13um CMOS three-step pipeline ADC for CIS applications. Analog circuits for CIS applications commonly employ a high supply voltage to acquire a sufficiently acceptable dynamic range, while digital circuits use a low supply voltage to minimize power consumption. The proposed ADC converts analog signals in a wide-swing range to low voltage-based digital data using both of the two supply voltages. An op-amp sharing technique employed in residue amplifiers properly controls currents depending on the amplification mode of each pipeline stage, optimizes the performance of op-amps, and improves the power efficiency. In three FLASH ADCs, the number of input stages are reduced in half by the interpolation technique while each comparator consists of only a latch with low kick-back noise based on pull-down switches to separate the input nodes and output nodes. Reference circuits achieve a required settling time only with on-chip low-power drivers and digital correction logic has two kinds of level shifter depending on signal-voltage levels to be processed. The prototype ADC in a 0.13um CMOS to support 0.35um thick-gate-oxide transistors demonstrates the measured DNL and INL within 0.42LSB and 1.19LSB, respectively. The ADC shows a maximum SNDR of 55.4dB and a maximum SFDR of 68.7dB at 50MS/s, respectively. The ADC with an active die area of 0.53$mm^2$ consumes 15.6mW at 50MS/s with an analog voltage of 2.0V and two digital voltages of 2.8V ($=D_H$) and 1.2V ($=D_L$).