• Journal of the Korea Society for Simulation
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• v.18 no.3
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• pp.147-154
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• 2009

In this study we investigate the problem of reducing color change cost at painting operations in an automobile assembly plant. Changing control logic at conveyor junction points prior to the top coat line has been proposed and analyzed using the discrete event simulation model we developed using AutoMod. We also discussed the project which initiated this research as well as the details of painting operations. Simulation analysis showed that the grouping ratio increases from 1.8 to 2.5 if the proposed control logic change is applied to the plant. Contrary to other approaches such as using dedicated equipment for resequencing, our approach has the merit of less investment cost, no need for additional space consumption. We finally note that the grouping ratio can be further increased if our algorithms is implemented as well as CRS (Color Rescheduling Storage) is installed.

• Journal of the Microelectronics and Packaging Society
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• v.21 no.4
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• pp.105-110
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• 2014

It is required to improve the efficiency and the reliability of the polymer solar cells (PSCs) as the energy saving optical device for the future application of the smart farm facilities. In this study, we fabricated the bulk hetero junction PSCs with organic passivation film layer for the reliability improvement of the devices. The effects of the passivation layer on the electrical properties of the PSCs were studied. The materials of passivation layer are composed of poly vinyl alcohol (PVA) and ammonium dichromate, and the passivation films were fabricated by the spin coating method on the P3HT:$PC_{61}BM$/LiF/Al substrate. The prepared structure of the device is the glass/ITO/PEDOT:PSS/P3HT:$PC_{61}BM$/LiF/Al/passivation layer. The performances of the PSCs with the organic passivation film showed better electrical properties compared with the PSCs without passivation layers. The power conversion efficiency (PCE) values of passivated PSCs decreased from 3.0 to 1.3% after air exposure for 140 hrs. In contrast, the PCE values for the devices without passivation decreased sharply from 3.5 to 0.1% under the same exposure condition.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.08a
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• pp.348-348
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• 2011

Carbon nanotube (CNT) field effect transistors and sensors use CNT as a current channel, of which the resistance varies with the gate voltage or upon molecule adsorption. Since the performance of CNT devices depends very much on the CNT/metal contact resistance, the CNT/electrode contact must be stable and the contact resistance must be small. Depending on the geometry of CNT/electrode contact, it can be categorized into the end-contact, embedded-contact (top-contact), and side-contact (bottom-contact). Because of difficulties in the sample preparation, the end-contact CNT device is seldom practiced. The embedded-contact in which CNT is embedded inside the electrode is desirable due to its rigidness and the low contact resistance. Fabrication of this structure is complicated, however, because each CNT has to be located under a high-resolution microscope and then the electrode is patterned by electron beam lithography. The side-contact is done by depositing CNT electrophoretically or by precipitating on the patterned electrode. Although this contact is fragile and the contact resistance is relatively high, the side-contact by far has been widely practiced because of its simple fabrication process. Here we introduce a simple method to embed CNT inside the electrode while taking advantage of the bottom-contact process. The idea is to utilize a eutectic material as an electrode, which melts at low temperature so that CNT is not damaged while annealing to melt the electrode to embed CNT. The lowering of CNT/Au contact resistance upon annealing at mild temperature has been reported, but the electrode in these studies did not melt and CNT laid on the surface of electrode even after annealing. In our experiment, we used a eutectic Au/Al film that melts at 250$^{\circ}C$. After depositing CNT on the electrode made of an Au/Al thin film, we annealed the sample at 250$^{\circ}C$ in air to induce eutectic melting. As a result, Au-Al alloy grains formed, under which the CNT was embedded to produce a rigid and low resistance contact. The embedded CNT contact was as strong as to tolerate the ultrasonic agitation for 90 s and the current-voltage measurement indicated that the contact resistance was lowered by a factor of 4. By performing standard fabrication process on this CNT-deposited substrate to add another pair of electrodes bridged by CNT in perpendicular direction, we could fabricate a CNT cross junction. Finally, we could conclude that the eutectic alloy electrode is valid for CNT sensors by examine the detection of Au ion which is spontaneously reduced to CNT surface. The device sustatined strong washing process and maintained its detection ability.

• Journal of the Korean Association of Oral and Maxillofacial Surgeons
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• v.27 no.3
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• pp.239-249
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• 2001

The purpose of this study is to evaluate the relationship of the factors which could be influenced by orthognathic surgery especillay SSRO. We measured the amounts of the maximum opening, lateral movements, maximum velocity and pattern of mandibular path during the opening and closing of mandible at the following times ; preoperative, 1 month after operation, 6 months after operation respectively using MKG. And the results were compared according to the categorized subgroups. Following results were obtained : 1. The change of the amounts of mandibular lateral movement and maximum opening velocity were statistically different between male and female (p<0.05), but the others were not. 2. According to the method of operation, there was no difference in the change of the mandibular movements between the group of SSRO and SSRO plus LeFort I osteotomy (p>0.05). 3. According to the amounts of mandibular movement, the recovery of left lateral movement of the group of $6{\sim}10mm$ was better than the other groups (p<0.05). 4. In the frontal pattern of the opening and closing of the mandible, the complex deflected type (F5), simple deflected type (F4), complex deviated type (F3), simple deviated type (F2), straight type (F1) were obtained in order at the time of preoperative, simple deflected type, simple deviated type, complex deviated type, straight type, complex deflected type in order at the time of 1 month after surgery, and the result at the time of 6 months after surgery was the same with that of the time of preoperative. In the sagittal pattern, non-coincident type (S2) was predominant at the time of preoperative, and coincident type (S1) was predominant at the time of 1 month after surgery. After 6 months, the result was also the same with that of the preoperative in sagittal pattern. 5. There was not a statistical difference in the change of the mandibular movement between group of presence of the preoperative TMJ symptoms and non-presence group (p>0.05). 6. There was not a statistical difference in the change of the mandibular movement between repositioning device applied group and non-applied group (p>0.05). 7. Sixty three percents of the patients who had preoperative TMJ symptoms were improved after surgery and preoperative TMJ symptoms were more improved after operation in the repositioning device non-applied group statistically (p<0.05).

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.38 no.2
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• pp.95-102
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• 2001

Nano-scale gate length MOSFET devices require extremely shallow source/drain eftension region with junction depth of 20∼30nm. In this work, 20nm $n^{+}$-p junctions that are realized by using this $As_{2}^{+}$ low energy ($\leq$10keV) implantation show the lower sheet resistance of the $1.0k\Omega$/$\square$ after rapid thermal annealing process. The $As_{2}^{+}$ implantation and RTA process make it possible to fabricate the nano-scale NMOSFET of gate length of 70nm. $As_{2}^{+}$ 5 keV NMOSFET shows a small threshold voltage roll-off of 60mV and a DIBL effect of 87.2mV at 100nm gate length devices. The electrical characteristics of the fabricated devices with the heavily doped and abrupt $n^{+}$-p junctions ($N_{D}$〉$10^{20}$$cm^{-3}$, $X_{j}$$\leq$20nm) suggest the feasibility of the nano-scale NMOSFET device fabrication using the $As_{2}^{+}$ low energy ion implantation.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.11 s.353
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• pp.1-7
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• 2006

3-dimensional(3-D) simulations of ideal double-gate bulk FinFET were performed extensively and the electrical characteristics. were analyzed. In 3-D device simulation, we changed gate length($L_g$), height($H_g$), and channel doping concentration($N_b$) to see the behaviors of the threshold voltage($V_{th}$), DIBL(drain induced barrier lowering), and SS(subthreshold swing) with source/drain junction depth($X_{jSDE}$). When the $H_g$ is changed from 30 nm to 45nm, the variation gives a little change in $V_{th}$(less than 20 mV). The DIBL and SS were degraded rapidly as the $X_{jSDE}$ is deeper than $H_g$ at low fin body doping($1{\times}10^{16}cm^{-3}{\sim}1{\times}10^{17}cm^{-3}$). By adopting local doping at ${\sim}10nm$ under the $H_g$, the degradation could be suppressed significantly. The local doping also alleviated $V_{th}$ lowering by the shallower $X_{jSDE}\;than\;H_g$ at low fin body doping.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.4
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• pp.75-87
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• 2010

For two input-protection schemes suitable for RF ICs utilizing the thyristor and diode protection devices, which can be fabricated in standard CMOS processes, we attempt an in-depth comparison on HBM ESD robustness in terms of lattice heating inside protection devices and peak voltages developed across gate oxides in input buffers, based on DC, mixed-mode transient, and AC analyses utilizing a 2-dimensional device simulator. For this purpose, we construct an equivalent circuit for an input HBM test environment of a CMOS chip equipped with the input ESD protection circuits, which allows mixed-mode transient simulations for various HBM test modes. By executing mixed-mode simulations including up to six active protection devices in a circuit, we attempt a detailed analysis on the problems, which can occur in real tests. In the procedure, we suggest to a recipe to ease the bipolar trigger in the protection devices and figure out that oxide failure in internal circuits is determined by the junction breakdown voltage of the NMOS structure residing in the protection devices. We explain the characteristic differences of two protection schemes as an input ESD protection circuit for RF ICs, and suggest valuable guidelines relating design of the protection devices and circuits.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.21 no.10
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• pp.379-385
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• 2020

This paper presents a design for preventing coolant leaks in the core part of a heater mounted in a combat vehicle. The heater is a device that makes heated coolant flow through the heater core in the crew room. A problem with coolant leaks in the heater core area during the operation of a combat vehicle was identified. This problem is caused mainly by high pressure at the junction of the tank and tube due to the vulnerability of this area. To solve this problem, an improved core was made by improving the welding method and changing the end region of the heater core to a structure that can withstand high pressure. When pressure was applied sequentially to the existing core and improved core, a leak occurred at 7.0 kgf/㎠ in the existing core while the improved core maintained its structure up to 17.0 kgf/㎠, highlighting the improvement. Finally, performance tests and environment tests were conducted to demonstrate the suitability of the improved structure. The improved heater will be applied to combat vehicles. This paper is expected to serve as a reference for improving defense capabilities by securing reliability as well as the design and analysis of failures of similar equipment.nse capabilities through securing reliability as well as the design and analysis of failures of similar equipment.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.02a
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• pp.27-27
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• 2011

For the design of real applicable molecular devices, current-voltage properties through molecular nanostructures such as metal-molecule-metal junctions (molecular junctions) have been studied extensively. In thiolate monolayers on the gold electrode, the chemical bonding of sulfur to gold and the van der Waals interactions between the alkyl chains of neighboring molecules are important factors in the formation of well-defined monolayers and in the control of the electron transport rate. Charge transport through the molecular junctions depends significantly on the energy levels of molecules relative to the Fermi levels of the contacts and the electronic structure of the molecule. It is important to understand the interfacial electron transport in accordance with the increased film thickness of alkyl chains that are known as an insulating layer, but are required for molecular device fabrication. Thiol-tethered RuII terpyridine complexes were synthesized for a voltage-driven molecular switch and used to understand the switch-on mechanism of the molecular switches of single metal complexes in the solid-state molecular junction in a vacuum. Electrochemical voltammetry and current-voltage (I-V) characteristics are measured to elucidate electron transport processes in the bistable conducting states of single molecular junctions of a molecular switch, Ru(II) terpyridine complexes. (1) On the basis of the Ru-centered electrochemical reaction data, the electron transport rate increases in the mixed self-assembled monolayer (SAM) of Ru(II) terpyridine complexes, indicating strong electronic coupling between the redox center and the substrate, along the molecules. (2) In a low-conducting state before switch-on, I-V characteristics are fitted to a direct tunneling model, and the estimated tunneling decay constant across the Ru(II) terpyridine complex is found to be smaller than that of alkanethiol. (3) The threshold voltages for the switch-on from low- to high-conducting states are identical, corresponding to the electron affinity of the molecules. (4) A high-conducting state after switch-on remains in the reverse voltage sweep, and a linear relationship of the current to the voltage is obtained. These results reveal electron transport paths via the redox centers of the Ru(II) terpyridine complexes, a molecular switch.

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2018.06a
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• pp.102-102
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• 2018

Electronic industry had required the finer size and the higher performance of the device. Therefore, 3-D die stacking technology such as TSV (through silicon via) and micro-bump had been used. Moreover, by the development of the 3-D die stacking technology, 3-D structure such as chip to chip (c2c) and chip to wafer (c2w) had become practicable. These technologies led to the appearance of HBM (high bandwidth memory). HBM was type of the memory, which is composed of several stacked layers of the memory chips. Each memory chips were connected by TSV and micro-bump. Thus, HBM had lower RC delay and higher performance of data processing than the conventional memory. Moreover, due to the development of the IT industry such as, AI (artificial intelligence), IOT (internet of things), and VR (virtual reality), the lower pitch size and the higher density were required to micro-electronics. Particularly, to obtain the fine pitch, some of the method such as copper pillar, nickel diffusion barrier, and tin-silver or tin-silver-copper based bump had been utillized. TCB (thermal compression bonding) and reflow process (thermal aging) were conventional method to bond between tin-silver or tin-silver-copper caps in the temperature range of 200 to 300 degrees. However, because of tin overflow which caused by higher operating temperature than melting point of Tin ($232^{\circ}C$), there would be the danger of bump bridge failure in fine-pitch bonding. Furthermore, regulating the phase of IMC (intermetallic compound) which was located between nickel diffusion barrier and bump, had a lot of problems. For example, an excess of kirkendall void which provides site of brittle fracture occurs at IMC layer after reflow process. The essential solution to reduce the difficulty of bump bonding process is copper to copper direct bonding below $300^{\circ}C$. In this study, in order to improve the problem of bump bonding process, copper to copper direct bonding was performed below $300^{\circ}C$. The driving force of bonding was the self-annealing properties of electrodeposited Cu with high defect density. The self-annealing property originated in high defect density and non-equilibrium grain boundaries at the triple junction. The electrodeposited Cu at high current density and low bath temperature was fabricated by electroplating on copper deposited silicon wafer. The copper-copper bonding experiments was conducted using thermal pressing machine. The condition of investigation such as thermal parameter and pressure parameter were varied to acquire proper bonded specimens. The bonded interface was characterized by SEM (scanning electron microscope) and OM (optical microscope). The density of grain boundary and defects were examined by TEM (transmission electron microscopy).