• Title/Summary/Keyword: Ion-Implant

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The effect of implant surface treated by anodizing on proliferation of the rat osteoblast (양극화 타이타늄 표면처리가 골모세포 증식에 미치는 영향)

  • Hur, Yin-Shik;Park, Joon-Bong;Kwon, Young-Hyuk;Herr, Yeek;Kim, Hyung-Sun;Cho, Byung-Won;Cho, Won-Il
    • Journal of Periodontal and Implant Science
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    • v.33 no.3
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    • pp.499-518
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    • 2003
  • The surface characteristics of titanium have been shown to have an important role in contact ossseointegration around the implant. Anodizing at high voltage produces microporous structure and increases thickness of surface titanium dioxide layer. The aim of present study was to analyse the response of rat calvarial osteoblast cell to commercially pure titanium and Ti-6A1-4V anodized in 0.06 mol/l ${\beta}$-glycerophosphate and 0.03 mol/l sodium acetate. In this study, rat calvarial osteoblasts were used to assay for cell viability and cell proliferation on the implant surface at 1,2,4,7 days. 1. Surface roughness was 1.256${\mu}m$ at 200V, and 1.745${\mu}m$ at 300V. 2. The thickness of titanium oxide layer was increased 1 ${\mu}m$ with the increase of 50V. 3. The proliferation rate of osteoblastic cells was increased with the increase of the surface roughness and the thickness of titanium oxide layer. 4. There was no difference in cell viability and cell proliferation between commercially pure titanium and Ti-6A1-4V anodized at the same condition. In conclusion, the titanium surface modified by anodizing was biocompatible, produced enhanced osteoblastic response. The reasons of enhanced osteoblast response might be due to reduced metal ion release by thickened and stabilized titanium dioxide layer and microporous rough structures.

Effects of Doping Concentration of Polycrystalline Silicon Gate Layer on Reliability Characteristics in MOSFET's (MOSFET에서 다결정 실리콘 게이트 막의 도핑 농도가 신뢰성에 미치는 영향)

  • Park, Keun-Hyung
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.31 no.2
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    • pp.74-79
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    • 2018
  • In this report, the results of a systematic study on the effects of polycrystalline silicon gate depletion on the reliability characteristics of metal-oxide semiconductor field-effect transistor (MOSFET) devices were discussed. The devices were fabricated using standard complimentary metal-oxide semiconductor (CMOS) processes, wherein phosphorus ion implantation with implant doses varying from $10^{13}$ to $5{\times}10^{15}cm^{-2}$ was performed to dope the polycrystalline silicon gate layer. For implant doses of $10^{14}/cm^2$ or less, the threshold voltage was increased with the formation of a depletion layer in the polycrystalline silicon gate layer. The gate-depletion effect was more pronounced for shorter channel lengths, like the narrow-width effect, which indicated that the gate-depletion effect could be used to solve the short-channel effect. In addition, the hot-carrier effects were significantly reduced for implant doses of $10^{14}/cm^2$ or less, which was attributed to the decreased gate current under the gate-depletion effects.

Optimal Design of ESD Protection Device with different Channel Blocking Ion Implantation in the NSCR_PPS Device (NSCR_PPS 소자에서 채널차단 이온주입 변화에 따른 최적의 정전기보호소자 설계)

  • Seo, Yong-Jin;Yang, Jun-Won
    • Journal of Satellite, Information and Communications
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    • v.11 no.4
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    • pp.21-26
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    • 2016
  • The ESD(electrostatic discharge) protection performance of PPS(PMOS pass structure) embedded N-type silicon controlled rectifier(NSCR_PPS) device with different implant of channel blocking region was discussed for high voltage I/O applications. A conventional NSCR standard device shows low on-resistance, low snapback holding voltage and low thermal breakdown voltage, which may cause latch-up problem during normal operation. However, our proposed NSCR_PPS devices with modified channel blocking structure demonstrate the improved ESD protection performance as a function of channel implant variation. Therefore, the channel blocking implant was a important parameter. Since the modified device with CPS_PDr+HNF structure satisfied the design window, we confirmed the applicable possibility as a ESD protection device for high voltage operating microchips.

Effects of TiN Coating on the Fatigue Fracture of Dental Implant System with Various Cyclic Loads

  • Jung, Da-Un;Chung, Chae-Heon;Son, Mee-Kyoung;Choe, Han-Cheol
    • Journal of the Korean institute of surface engineering
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    • v.48 no.6
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    • pp.283-291
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    • 2015
  • The purpose of this study was to investigate effects of TiN coating on the fatigue fracture of dental implant system with various cyclic loads. TiN coated abutment screw, the fixture, and abutment of internal hex type were prepared for fatigue test. The fatigue test was carried out according to ISO 14801:2003(E) using tensile and compression tester with repeated load from 30% to 80% of static fracture force. Morphology and fractured surface was observed by field emission scanning electron microscope(FE-SEM) and energy dispersive X-ray spectroscope(EDS). The fracture cycle drastically decreased as repeated load increased. Especially, in the case of TiN-coated abutment screw, fracture cycle increased compared to non-coated abutment screw. The fatigue crack was propagated fast as repeated load increased. The plastic deformation region decreased, whereas, cleavage fracture region increased as repeated load increased.

Optimum Implant Depth and Its Determination in Implanted Vertical Cavity Surface Emitting Lasers (임플랜트된 표면 방출형 레이저에서 최적 임플랜트 깊이와 최적 깊이 판정 방법)

  • 안세환;김상배
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.41 no.8
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    • pp.45-50
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    • 2004
  • The characteristics and reliability of implanted VCSELs are greatly influenced by the thickness of the semi-insulating layer made by ion implantation for the current confinement. We propose a simple and purely electrical method of estimating the optimum implant depth, and find that the implant front should be located 2-DBR periods above the 1 - λ cavity in order to obtain simultaneously the low threshold current and high reliability.

Computer Simulaton of Defect Formation Behaviors of Crystal-Silicon on the Low Energy Arsenic Implantation by Molecular Dynamics (분자동력학적 방법에 의한 저 메너지 As 이온 주입에 따른 Si 기판의 결함 형성 거동에 대한 컴퓨터 모사 실험)

  • Chung, Dong-Seok;Park, Byung Do
    • Journal of the Korean Society for Heat Treatment
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    • v.13 no.4
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    • pp.259-264
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    • 2000
  • In this study, we quantitatively measure the ion ranges of arsenic with energies ranging from 10 KeV to 100 KeV, implanted at $3^{\circ}$, $9^{\circ}$ $15^{\circ}$ the (100) plane, and the damage created during ion implantation. To obtain detailed information of ion range and damage distributions in low energy region where elastic collisions dominate the slowing down process, molecular dynamics computer simulation was performed and compared to the existing results. The effects of implant energy and degree on damage generation are present. The number of vacancy were calculated from the deposited energy using Kinchin-Pease equation. In the energy range 10 keV-100 keV, simulations show that the number of Frenckel pairs produced by As-ion bimbardment is 9 and incident angle dependence of the vacancy was the same but defects were distributed at different depth.

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Phenomenological monte carlo simulation model for predicting B, $BF_2$, As, P and Si implant profiles in silicon-based semiconductor device

  • Kwon, Oh-Kuen;Son, Myung-Sik;Hwang, Ho-Jung
    • Journal of Korean Vacuum Science & Technology
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    • v.3 no.1
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    • pp.1-9
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    • 1999
  • This paper presents a newly enhanced damage model in Monte Carlo (MC) simulation for the accurate prediction of 3-Dimensional (3D) as-implanted impurity and point defect profiles induced by ion implantation in (100) crystal silicon. An empirical electronic energy loss model for B, BF2, As, P and Si self implant over the wide energy range has been proposed for the ULSI device technology and development. Our model shows very good agreement with the SIMS data over the wide energy range. In the damage accumulation, we considered the self-annealing effects by introducing our proposed non-linear recomvination probability function of each point defect for the computational efficiency. For the damage profiles, we compared the published RBS/channeling data with our results of phosphorus implants. Our damage model shows very reasonable agreement with the experiments for phosphorus implants.

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A Study on Ultra-Shallow Junction Formation using Upgraded MDRANGE (향상된 MDRANGE을 사용한 초미세 접합 형성에 관한 연구)

  • 강정원;강유석
    • Proceedings of the IEEK Conference
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    • 1998.10a
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    • pp.585-588
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    • 1998
  • We investigated the ultra-low energy B, P, and As ion implantation using ungraded MDRANGE code to form nanometer junction depths. Even at the ultra-low energies that were simulated in paper, it was found that channeling cases must be carefully considered. In the cases of B, channeling occurred above 500 eV, in the cases of P, channeling occurred above 1 keV, and in the cases of As, channeling occurred above 2 keV. Comparing 2D dopant profiles of 1 keV B, 2 keV P, and 5 keV As with tilts, we demonstrated that most channeling cases occurred not lateral directions but depth directions. Through thus results, even below 5 keV energy ion implant considered here, it is estimated that channeling effects are important in the formation of nanometer junction depths.

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Annealing Behavior of Ar Implant Induced Damage in Si (Ar이 이온주입된 Si 기판의 결함회복 특성)

  • 김광일;이상환;정욱진;배영호;권영규;김범만;삼야박
    • Journal of the Korean Vacuum Society
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    • v.2 no.4
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    • pp.468-473
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    • 1993
  • Damages on Si substrate induced by Ar ion implantation and it annealing behavior during rapid thermal annealing were investigated by the cross-sectional TEM (transmissin electron microscopy), RB(Rutherfordbackscattering) spectra an dthermal wave (TW) modulation reflectance methods. Continuous amorphous layer extending to the surface were generated by Ar ion implantation for higher doses than 1 $\times$1015cm-2. The recrystallization of the amorphous layer prodeeded as the annealing temperature increased . However the amorphous /crystal interfacial undulations caused the micro twins and damage clusters. Damage clusters generated by lower doses than 1 $\times$1015 cm-2 disappeared slowly as the annealing temperature increased, but even at 110$0^{\circ}C$ a few damage clusters still remained.

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Latchup characteristics of BL/BILLI retrograde twin well CMOS with MeV ion implanted Bored Layer (MeV 이온주입에 의한 매입층을 갖는 BILLI retrograde well과 latchup 특성)

  • Kim, Jong-Kwan;Kim, In-Soo;Kim, Young-Ho;Shin, Sang-Woo;Sung, Yung-Kwon
    • Proceedings of the KIEE Conference
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    • 1997.07d
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    • pp.1270-1273
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    • 1997
  • We have investigated the latchup characteristics of BL/BILLI retrograde twin well CMOS that has the high energy ion implanted buried layer to intend for more improvement of latchup compare to conventional retrograde well and BILLI structures. We explored the dependence of various latchup characteristics such as n+ trigger latchup and p+ trigger latchup on the buried layer implant doses. We show various DC latchup characteristics that allow us to evaluate each technology and suggest guidelines for the reduction of latchup susceptibility.

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