• 대한전기학회:학술대회논문집
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• 대한전기학회 2000년도 하계학술대회 논문집 B
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• pp.1227-1229
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• 2000

The output voltage of UPS must not vary according to the load variation But the output voltage varies due to the load variation when a PI voltage regulator is used which has inherently a static state error. This paper presents a static-error-free digital PID voltage regulator for an UPS inverter to overcome additionally the voltage unbalance problem in three Phase system as well as the above problem.

• 전기학회논문지
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• 제66권11호
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• pp.1584-1590
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• 2017

This paper presents a implementation method of reliable speed limitation controller considering motor parameter variation in high speed operation. In spinning process of drum washing machine, speed increase has to be limited when unallowable imbalance mass is detected. Otherwise, severe noise and vibration can happen because noise and vibration are proportional to imbalance mass. To detect imbalance mass, d-axis current magnitude is used. However, we have to compensate for back-emf and power supply variation by means of detecting them because d-axis current is affected by both of them. On the other hand, we have to carefully estimate back-emf because back-emf is affected by stator resistance variation and inverter voltage error. Stator resistance variation can happen by manufacturing process for mass production or temperature variation in running. And there are inverter voltage errors between command voltage from micro-computer to inverter and real voltage from inverter to motor because of rising and falling time delay and turn-on resistance of power semiconductor switch. To solve this problem, we propose 2-step align current injection method which is to inject step-wise current right before starting. By this method, we can simply obtain stator resistance by ratio of voltage without inverter voltage error and current, and we can measure inverter voltage error. So we can obtain more exact model current, and then by simple calculation with compensation gain, we can estimate more accurate motor back-emf. We show that this method works well. It is verified through experiments.

• Journal of Power Electronics
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• 제15권6호
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• pp.1593-1600
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• 2015

This paper proposes a novel compensation algorithm of current offset error for single-phase linear compressor in home appliances. In a half-bridge inverter, current offset error may cause unbalanced DC-link voltage when the DC-link is comprised of two serially connected capacitors. To compensate the current measurement error, the synchronous reference frame transformation is used for detecting the measurement error. When an offset error occurs in the output current of the half-bridge inverter, the d-axis current has a ripple with frequency equal to the fundamental frequency. With the use of a proportional-resonant controller, the ripple component can be removed, and offset error can be compensated. The proposed compensation method can easily be implemented without much computation and additional hardware circuit. The validity of the proposed algorithm is verified through experimental results.

• 산업기술연구
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• 제28권B호
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• pp.167-174
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• 2008

In this paper, the analysis on type effect of inverter output voltage distortion on the control of an induction motor is discussed. The inverter output voltage is distorted differently from the reference voltage owing to the inverter nonlinear characteristic. The inverter nonlinear characteristic results from the voltage drop, the inherent characteristic of the power semiconductor, and the dead time for preventing the short circuit of the inverter leg. This characteristic distorts the inverter output voltage and then, causes the motor flux estimation error. Although this characteristics do not significantly effect in the general-purpose induction motor control, but significantly effect on the low-speed operation of high performance motor control such as the sensorless vector control.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2002년도 전력전자학술대회 논문집
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• pp.343-346
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• 2002

In recent, complex SVPWM (Space Vector PWM) algorithm can be easily implemented by high performance microprocessor and DSP. Various SVPWM techniques are widely studied due to the advantages of low harmonic distortion and high use ratio of D.C. link voltage. Most of various studies for improving of VS-PWM inverter performance are concentrated about switching pattern and zero pulse pattern split algorithms. However, dc link voltage that is determined at rated load and speed conditions is not proper in the low speed and under rated load. In this paper, analysis of current ripple with digitally implemented SVPWM inverter is introduced according to link voltage. The optimal link voltage in the designed inverter system and load condition is provided in order to suppress output voltage error and current ripple. As remaining the effective voltage vector interval per sampling period sufficiently, additional voltage error and current ripple are suppressed. The proposed algorithm is verified through digital simulation and experimental results.

• International Journal of Control, Automation, and Systems
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• 제3권4호
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• pp.620-630
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• 2005

This paper presents a digital controller for a single phase UPS inverter under two main considerations: (i) the overall system shall keep very low AC-voltage tracking error as well as no phase delay over different load conditions, and (ii) the digital controller shall be employed at a fixed sampling time. We propose that the former can be achieved by the proposed controller using the error-state approach and the latter can be dealt with by the socalled characteristics ration assignment.

• Journal of Power Electronics
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• 제19권6호
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• pp.1582-1590
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• 2019

A new method for reducing the common-mode current generated by the voltage variations in a two-inverter air conditioner system by applying a synchronized pulse-width modulation (PWM) strategy is proposed. The PWM signals of the master-mode inverter are generated based on the reference voltage, while those of the slave-mode inverter are output in the opposite direction when the master-mode inverter changes its switching state. However, the slave-mode control results in a mismatch between the reference voltage and the actual output voltage that is modified by synchronized control operation. The proposed method is capable of reducing and controlling this voltage error by performing signal selection in the vector space of the slave-mode inverter, which mitigates the distortion of the phase current. The efficacy of this method in reducing conducted emissions has been validated both theoretically and experimentally.

• Journal of Power Electronics
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• 제15권6호
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• pp.1567-1576
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• 2015

Offline inductance identification of a permanent magnet synchronous motor (PMSM) is essential for the design of the closed-loop controller and position observer in sensorless vector controlled drives. On the base of the offline inductance identification method combining direct current (DC) offset and high frequency (HF) voltage injection which is fulfilled at standstill, this paper investigates the inverter nonlinearity effects on the inductance identification while considering harmonics in the induced HF current. The negative effects on d-q axis inductance identifications using HF signal injection are analyzed after self-learning of the inverter nonlinearity characteristics. Then, both the voltage error and the harmonic current can be described. In addition, different cases of voltage error distribution with different injection conditions are classified. The effects of inverter nonlinearities on the offline inductance identification using HF injection are validated on a 2.2 kW interior PMSM drive.

• Journal of Power Electronics
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• 제16권1호
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• pp.388-397
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• 2016

An error-compensated pulse width modulator (ECPWM) is proposed to improve the baseband harmonic performance and the switching loss of voltage source inverters (VSIs). Selecting between harmonic distortion and switching loss is a design tradeoff in the conventional space vector pulse width modulation. In this work, an accumulated difference in produced and desired phase voltages is considered to adjust the reference signal. This mechanism can compensate for the voltage error in the previous carrier period. With error compensation every half-carrier period, the proposed ECPWM allows one-half reduction in carrier frequency without scarifying baseband harmonic distortion. The proposed modulator is applied to a three-phase VSI with R-L load and a motor-speed-control system for experiments. The measured efficiency and operating temperature of switches confirm the effectiveness of the proposed scheme.

• 전기전자학회논문지
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• 제26권2호
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• pp.271-279
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• 2022

본 논문은 플로팅 커패시터를 갖는 이중 인버터의 향상된 데드 타임 보상 기법을 제안한다. 플로팅 커패시터를 갖는 이중 인버터는 2-레벨 단일 인버터보다 전력 반도체가 6개가 추가된다. 전력 반도체의 수가 증가로 이중 인버터의 출력 전압은 추가된 전력 반도체의 도통 전압만큼 감소되며 출력 전류 품질은 전력 반도체에 의한 전압 강하와 데드 타임에 의해 저하된다. 본 논문에서 제안하는 기법은 이중 인버터의 데드 타임 및 전력 반도체의 도통 전압을 보상하여 전류 품질을 개선하고 추가적인 대역통과 필터를 이용한 고조파 보상 기법을 통해 데드 타임과 도통 전압 보상에 대한 오차를 추가 보상한다.