• The Transactions of the Korean Institute of Power Electronics
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• v.26 no.1
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• pp.53-58
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• 2021

Operation of the interleaved Boost PFC converter in Critical Conduction Mode (CrM) shows the advantages of high efficiency and good EMI characteristics owing to the valley switching of FET. However, when it is designed for a highly pulsating load, operation at a relatively high frequency is inevitable at non-pulsating typical load condition, resulting in efficiency degradation. Moreover, the physical size of the inductor becomes problematic because of the nature of the CrM operation, where the inductor peak current is about two times the inductor average current, thereby requiring high DC-bias characteristics, which is worse when the output power is high. In this study, a new parallel driving method of two sets of interleaved boost PFC converters for highly pulsating high-power application is proposed. The proposed method does not require any additional load-sharing controller, resulting in high efficiency and smaller inductor size.

• Journal of the Korean Society for Precision Engineering
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• v.27 no.4
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• pp.14-19
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• 2010

In this paper, using interleaved power factor correction how to improve the inverter efficiency studied. Interleaved method can reduce the conduction losses and the inductor energy. Generally, critical conduction mode (CRM) boost PFC converter used low power level because of the high peak currents. if you use the interleaved mode, CRM PFC can be used medium or high power application. interleaved CRM PFC can reduce current ripple for higher system reliability and size of buck capacitor and EMI filter size. Interleaved CRM PFC that is installed in front of inverter can maintain the constant voltage regardless of the input voltage.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.52 no.7
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• pp.343-351
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• 2003

In this paper, interleaved boost converter is applied as a first-stage converter in switch mode power supply. The first-stage converter plays a role to improve power factor. Interleaved Boost Power Factor Corrector(IBPFC) can reduce input current ripple as a single voltage control loop only without inner current loop, because input current is divided each 50% by two switching devices. Each converter cell is also operated in discontinuous current mode and inductor current of each converter is discontinuous. Total input current which is composed by each converter cell is continuous current. Thus, IBPFC is able to improve input current ripple. IBPFC operating in discontinuous current mode can be classified as six modes from switching state and be carried out state space averaging small signal modeling. A control transfer function is obtained according to the modeling. Not only steady-state characteristics but also dynamic characteristics is considered. Single voltage control loop is also constructed by the control transfer function. From experimental result, improvement of power factor and input current ripple are verified.

• Proceedings of the KIPE Conference
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• 2017.07a
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• pp.24-25
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• 2017

In this paper, a low cost bridgeless interleaved power factor correction topology for electric vehicle charger application is proposed. With the proposed topology the number of switches, inductors, current sensors and associated circuits can be reduced, thereby reducing the cost of the system as compared to the conventional bridgeless PFC circuit. The reduced input current ripple by the proposed interleaved topology makes it suitable for high power applications such as electric vehicle chargers since it can reduce the size of the inductor core and the Electro Magnetic Interference (EMI) problem. In the proposed topology only one current sensor is required. All the boost inductor currents can be reconstructed by sampling the output current and used to control the input current. Therefore the typical problem caused by the unequal current gain of each current sensor inherently does not exist in the proposed topology. In addition the current sharing between converters can be achieved more accurately and the high frequency distortion is decreased. The performance of the proposed converter is verified by the experimental results with a prototype of 6.6kW bridgeless interleaved PFC circuit.

• Proceedings of the KIEE Conference
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• 2009.07a
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• pp.961_962
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• 2009

A novel, two-inductor, interleaved power-factor-corrected (PFC) boost converter that exhibits voltage-doubler characteristic when it operates with a duty cycle greater than 0.5 is introduced. The voltage-doubler characteristic of the proposed converter makes it quite suitable for universal-line (90~265VRMS) PFC applications. Because the proposed PFC boost rectifier operates as a voltage doubler at low line, its low-line range efficiency is greatly improved compared to that of its conventional counterpart. The performance of the proposed PFC rectifier was evaluated on an experimental 300W PFC prototype.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.23 no.12
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• pp.127-135
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• 2009

In this paper, the Interleaved AC/DC boost converter using two inductor with voltage-doubler characteristic when it operates with a duty cycle greater than 0.5 is proposed. Generally, the low-line(Input AC 110[V]) operation of the AC/DC boost converter is much less efficient than high-line (Input AC 220[V]) operation. The proposed Interleaved AC/DC boost converter operates as a voltage doubler at low-line. Its low-line range have higher power factor and improved efficiency compared with that of conventional converter. This research proposed the Interleaved AC/DC boost converter for voltage-doubler characteristic. The principle of operation, feature and design considerations is illustrated and the validity of verified through the experiment with a 300[W] based experimental circuit.

• The Transactions of the Korean Institute of Power Electronics
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• v.20 no.3
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• pp.214-222
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• 2015

The superiority of gallium nitride FET (GaN FET) over silicon MOSFET is examined in this paper. One of the outstanding features of GaN FET is low reverse-recovery charge, which enables continuous conduction mode operation of totem-pole bridgeless boost power factor correction (PFC) circuit. Among many bridgeless topologies, totem-pole bridgeless shows high efficiency and low conducted electromagnetic interference performance, with low cost and simple control scheme. The operation principle, control scheme, and circuit implementation of the proposed topology are provided. The converter is driven in two-module interleaved topology to operate at a power level of 5.5 kW, whereas phase-shedding control is adopted for light load efficiency improvement. Negative bias circuit is used in gate drivers to avoid the shoot-through induced by high speed switching. The superiority of GaN FET is verified by constructing a 5.5 kW prototype of two-module interleaved totem-pole bridgeless boost PFC converter. The experiment results show the highest efficiency of 98.7% at 1.6 kW load and an efficiency of 97.7% at the rated load.

• Proceedings of the KIEE Conference
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• 2009.04b
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• pp.152-155
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• 2009

In high power application, PFC(Power Factor Correction) pre-regulators are generally required. PFC pre-regulators could achieve unity power factor, reduce line input current harmonics and utilize full line power. Interleaving PFC converters could reduce input ripple current, output capacitor ripple current and inductor size. With this closed loop interleaving method, both two phase converters are working at the boundary between continuous and discontinuous mode and accurate 180 degree phase shift is achieved. Implementation of this strategy could be easily integrated to the control chip. Finally, experimental results of a two-phase interleaved boost PFC are presented to verify the discussed features.

• Proceedings of the KIPE Conference
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• 2017.07a
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• pp.78-79
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• 2017

본 논문에서는 스위칭 손실을 저감한 고주파 인터리브드 토템폴 브리지리스 부스트 PFC 컨버터를 제안한다. 인터리브드 토템폴 브리지리스 부스트 PFC 컨버터는 하드 스위칭 동작을 하기 때문에 큰 스위칭 손실을 가지며, 고주파에서의 동작이 제한된다. 제안하는 컨버터는 수동 소자인 인덕터가 추가된 구조이며, 추가 인덕터의 에너지를 이용해 영전압 스위칭을 할 수 있다. 그 결과, 스위칭 손실이 저감되고 고주파 동작이 가능해진다. 또한 기존에 설계된 회로와 제어단을 그대로 유지할 수 있다.

• Journal of Power Electronics
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• v.10 no.2
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• pp.132-137
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• 2010

Interleaving techniques are widely used to reduce input/output ripples and to increase the power capacity of boost converters operating in critical conduction mode. Two types of phase-shift control schemes are studied in this paper, the turn-on time shifting method and the turn-off time shifting method. It is found that although the turn-off time shifting method exhibits better performance, it suffers from sub-harmonic oscillations at high input voltages. To solve this problem, an intensive quantitative analysis of the sub-harmonic oscillation phenomenon is made in this paper. Based upon that, a novel modified turn off time shifting control scheme for interleaved boost converters operating in critical conduction mode is proposed. An important advantage of this scheme is that both the master phase and the slave phase can operate stably in critical conduction mode without any oscillations in the full input voltage range. This method is implemented with a FPGA based digital PWM control platform, and tests were carried out on a two-phase interleaved boost PFC converter prototype. Experimental results demonstrated the feasibility and performance of the proposed phase-shift control scheme.