• Title/Summary/Keyword: Interface trap

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Properties of the oxynitride films formed by thermal reoxidation in $N_2{O}$ gas ($N_2{O}$가스로 재산화시킨 oxynitride막의 특성)

  • 김태형;김창일;최동진;장의구
    • Electrical & Electronic Materials
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    • v.7 no.1
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    • pp.25-31
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    • 1994
  • Properties of oxynitride films reoxidized by $N_2{O}$ gas after thermal oxidation and $N_2{O}$ oxide films directly oxidized by using $N_2{O}$ gas on the bare silicon wafer have been studied. From the AES analysis, nitrogen pile-up at the interface of Si/oxynitride and Si/$N_2{O}$ oxide has observed. $N_2{O}$ oxide and oxynitride films have the self-limited characteristics. Therefore, it will be possible to obtain ultra-thin films. Nitrogen pile-up at the interfaces of Si/oxynitride and Si/$N_2{O}$ oxide strengthens film structure and improves dielectric reliability. Although fixed charge densities and interface trap densities of N20 oxide and oxynitride films have somewhat higher than those of thermal $SiO_2{O}$, $N_2{O}$ oxide and oxynitride films showed improved I-V characteristics and constant current stress.

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Optimization of remote plasma enhanced chemical vapor deposition oxide deposition process using orthogonal array table and properties (직교배열표를 쓴 remote-PECVD 산화막형성의 공정최적화 및 특성)

  • 김광호;김제덕;유병곤;구진근;김진근
    • Electrical & Electronic Materials
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    • v.8 no.2
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    • pp.171-175
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    • 1995
  • Optimum condition of remote plasma enhanced chemical vapor deposition using orthogonal array method was chosen. Characteristics of oxide films deposited by RPECVD with SiH$_{4}$ and N$_{2}$O gases were investigated. Etching rate of the optimized SiO$_{2}$ films in P-etchant was about 6[A/s] that was almost the same as that the high temperature thermal oxide. The films showed high dielectric breakdown field of more than 7[MV/cm] and a resistivity of 8*10$^{13}$ [.ohmcm] around at 7[MV/cm]. The interface trap density of SiO$_{2}$/Si interface around the midgap derived from the high frequency C-V curve was about 5*10$^{10}$ [/cm$^{2}$eV]. It was observed that the dielectric constant of the optimized SiO$_{2}$ film was 4.29.

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The Passivation of GaAs Surface by Laser CVD

  • Sung, Yung-Kwon;Song, Jeong-Myeon;Moon, Byung-Moo;Rhie, Dong-Hee
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.16 no.12S
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    • pp.1242-1247
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    • 2003
  • In order to passivate the GaAs surface, silicon-nitride films were fabricated by using laser CVD method. SiH$_4$ and NH$_3$ were used to obtain SiN films in the range of 100∼300$^{\circ}C$ on p-type (100) GaAs substrate. To determine interface characteristics of the metal-insulator-GaAs structure, electrical measurements were performed such as C-V curves and deep level transient spectroscopy (DLTS). The results show that the hysteresis was reduced and interface trap density was lowered to 1,012 ∼ 1,013 at 100 ∼ 200$^{\circ}C$. According to the study of surface leakage current, the passivated CaAs has less leakage current compared to non-passivated substrate.

Novel OLED structure allowing for the in-situ ohmic contact and reduction of charge accumulation in the device

  • Song, Won-Jun;Kristal, Boris;Lee, Chong-Hoon;Sung, Yeun-Joo;Koh, Sung-Soo;Kim, Mu-Hyun;Lee, Seong-Taek;Kim, Hye-Dong;Lee, Chang-Hee;Chung, Ho-Kyoon
    • 한국정보디스플레이학회:학술대회논문집
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    • 2007.08a
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    • pp.1014-1018
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    • 2007
  • We have demonstrated the enhancement of the power efficiency and device lifetime of organic light-emitting diodes (OLEDs) by introducing the ETL 1 / ETL2 (composite ETL) structure between EML and cathode and the HIL1 (composite HIL) / HIL2 between anode and HTL. Compared to reference devices retaining conventional architecture, novel OLED structure shows an outstanding EL efficiency that is 1.6 times higher (${\sim}4.5$ lm/w versus ${\sim}$ 2.71 lm/w for the reference device) and lower driving voltage $({\bigtriangleup}V>1V)$, but also a longer lifetime and smaller operating voltage drift over time. It is suggested in this work that the device performance can be improved by in-situ ohmic contact through novel electron controlled structure and reduction of charge accumulation in the interface through composite HIL

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Characteristics of oxynitride films grown by PECVD using $N_2O$ gas ($N_2O$가스를 사용하여 PECVD로 성장된 Oxynitride막의 특성)

  • 최현식;이철인;장의구
    • Electrical & Electronic Materials
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    • v.9 no.1
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    • pp.9-17
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    • 1996
  • Plasma enhanced chemical vapor deposition (PECVD) allows low temperature processing and so it is widely used, but it causes instability of devices due to serious amount of impurities within the film. In this paper, electrical and chemical characteristics of the PECVD oxynitride film formed by different N$_{2}$O to N$_{2}$O+NH$_{3}$ gas ratio is studied. It has been found that hydrogen concentration of PECVD oxynitride film was decreased from 4.25*10$^{22}$ [cm$^{-2}$ ] to 1.18*10$^{21}$ [cm$^{-2}$ ] according to the increase of N$_{2}$O gas. It was also found that PECVD oxynitride films have low trap density in the oxide and interface in comparison with PECVD nitroxide films, and has higher refractive index and capacitance than oxide films. In particular, oxynitride film formed in gas ratio of N$_{2}$O/(N$_{2}$O+NH$_{3}$)= 0.88 shows increased capacitance and decreased leakage current due to small portion of hydrogen in oxide and the accumulation of nitrogen about 4[atm.%] at the interface.

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Studies for Improvement in SiO2 Film Property for Thin Film Transistor (박막트랜지스터 응용을 위한 SiO2 박막 특성 연구)

  • Seo, Chang-Ki;Shim, Myung-Suk;Yi, Junsin
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.17 no.6
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    • pp.580-585
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    • 2004
  • Silicon dioxide (SiO$_2$) is widely used as a gate dielectric material for thin film transistors (TFT) and semiconductor devices. In this paper, SiO$_2$ films were grown by APCVD(Atmospheric Pressure chemical vapor deposition) at the high temperature. Experimental investigations were carried out as a function of $O_2$ gas flow ratios from 0 to 200 1pm. This article presents the SiO$_2$ gate dielectric studies in terms of deposition rate, refrative index, FT-IR, C-V for the gate dielectric layer of thin film transistor applications. We also study defect passivation technique for improvement interface or surface properties in thin films. Our passivation technique is Forming Gas Annealing treatment. FGA acts passivation of interface and surface impurity or defects in SiO$_2$ film. We used RTP system for FGA and gained results that reduced surface fixed charge and trap density of midgap value.

Synthesis and characterization of silanized-SiO2/povidone nanocomposite as a gate insulator: The influence of Si semiconductor film type on the interface traps by deconvolution of Si2s

  • Hashemi, Adeleh;Bahari, Ali
    • Current Applied Physics
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    • v.18 no.12
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    • pp.1546-1552
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    • 2018
  • The polymer nanocomposite as a gate dielectric film was prepared via sol-gel method. The formation of crosslinked structure among nanofillers and polymer matrix was proved by Fourier transform infrared spectroscopy (FT-IR). Differential thermal analysis (DTA) results showed significant increase in the thermal stability of the nanocomposite with respect to that of pure polymer. The nanocomposite films deposited on the p- and n-type Si substrates formed very smooth surface with rms roughness of 0.045 and 0.058 nm respectively. Deconvoluted $Si_{2s}$ spectra revealed the domination of the Si-OH hydrogen bonds and Si-O-Si covalence bonds in the structure of the nanocomposite film deposited on the p- and n-type Si semiconductor layers respectively. The fabricated n-channel field-effect-transistor (FET) showed the low threshold voltage and leakage currents because of the stronger connection between the nanocomposite and n-type Si substrate. Whereas, dominated hydroxyl groups in the nanocomposite dielectric film deposited on the p-type Si substrate increased trap states in the interface, led to the drop of FET operation.

Effects of Annealing on Electrical Characteristics of Double-Gated Silicon Nanosheet Feedback Field-Effect Transistors (더블게이트 실리콘 나노시트 피드백 전계효과 트랜지스터의 전기적 특성에 미치는 열처리 효과)

  • Hyojoo Heo;Yunwoo Shin;Jaemin Son;Seungho Ryu;Kyoungah Cho;Sangsig Kim
    • Journal of IKEEE
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    • v.27 no.4
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    • pp.418-424
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    • 2023
  • In this study, we examined the effects of annealing on electrical characteristics of double-gated silicon nanosheet (SiNS) feedback field effect transistors (FBFETs). When bias stresses were applied for 1000 s, the double-gated SiNS FBFETs were more affected by positive bias stresses than negative bias stresses regardless of the channel mode owing to the increase of interface traps caused by electrons in the inversion layers. After annealing at 300 ℃ for 10 mins, the devices were completely recovered to their original properties, and the characteristics did not change anymore when bias stresses were applied again for 1000 s.

Characterization of Hot Carrier Mechanism of Nano-Scale CMOSFETs (나노급 소자의 핫캐리어 특성 분석)

  • Na Jun-Hee;Choi Seo-Yun;Kim Yong-Goo;Lee Hi-Deok
    • Proceedings of the IEEK Conference
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    • 2004.06b
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    • pp.327-330
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    • 2004
  • It is shown that the hot carrier degradation due to enhanced hot holes trapping dominates PMOSFETs lifetime both in thin and thick devices. Moreover, it is found that in 0.13 ${\mu}m$ CMOSFET the PMOS lifetime under CHC (Channel Hot Carrier) stress is lower than the NMOSFET lifetime under DAHC (Drain Avalanche Hot Carrier) stress. Therefore. the interface trap generation due to enhanced hot hole injection will become a dominant degradation factor. In case of thick MOSFET, the degradation by hot carrier is confirmed using charge pumping current method and highly necessary to enhance overall device lifetime or circuit lifetime in upcoming nano-scale CMOS technology.

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In-Situ Fluorine Passivation by Excimer Laser Annealing

  • Jung, Sang-Hoon;Kim, Cheon-Hong;Jeon, Jae-Hong;Yoo, Juhn-Suk;Han, Min-Koo
    • Journal of Information Display
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    • v.1 no.1
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    • pp.25-28
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    • 2000
  • We propose a new in-situ fluorine passivation of poly-Si TFTs using excimer laser annealing to reduce the trap state density and improve reliability significantly. To investigate the effect of an in-situ fluorine passivation, we have fabricated fluorine-passivated p-channel poly-Si TFTs and examined their electrical characteristics and stability. A new in-situ fluorine passivation brought about an improvement in electrical characteristic. Such improvement is due to the formation of stronger Si-F bonds than Si-H bonds in poly-Si channel and $SiO_2$/Poly-Si interface.

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