• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.31 no.4
• /
• pp.203-207
• /
• 2018

In this work, we investigate the effects of lithium doping on the electric performance of solution-processed n-type zinc tin oxide (ZTO)/p-type silicon carbide (SiC) heterojunction diode structures. The proper amount of lithium doping not only affects the carrier concentration and interface quality but also influences the temperature sensitivity of the series resistance and activation energy. We confirmed that the device characteristics vary with lithium doping at concentrations of 0, 10, and 20 wt%. In particular, the highest rectification ratio of $1.89{\times}107$ and the lowest trap density of $4.829{\times}1,022cm^{-2}$ were observed at 20 wt% of lithium doping. Devices at this doping level showed the best characteristics. As the temperature was increased, the series resistance value decreased. Additionally, the activation energy was observed to change with respect to the component acting on the trap. We have demonstrated that lithium doping is an effective way to obtain a higher performance ZTO-based diode.

• Applied Chemistry for Engineering
• /
• v.9 no.7
• /
• pp.990-997
• /
• 1998

In this work, the $SiO_2$ films on the silicon substrate with different orientations were first prepared by the low temperature process using the ECR plasma diffusion as a function of microwave power and oxidation time. Before and after thermal treatment, the surface morphology, Si/O ratio from physicochemical properties, and the electrical properties of the oxide films were also investigated. The oxidation rate increased with microwave power, while surface morphology showed the nonuniform due to etching. The film quality, therefore, was lowered with increasing the defect by etching and the content of positive oxide ions in the oxide films from bulk by higher self-DC bias. The content of positive oxide ions in the oxide films with different Si orientations showed Si(100) < Si(111) < poly Si. The defects in $Si/SiO_2$ interface of $SiO_2$ film could be decreased by annealing, while $Q_{it}$ and $Q_f$ were independent of thermal treatment and the dependent on concentration of reactive oxide ions and self-DC bias of substrate. At microwave power of 300, and 400 W, the high quality $SiO_2$ film that had lower surface roughness and defect in $Si/SiO_2$ interface was obtained. The value of interface trap density, then, was ${\sim}9{\times}10^{10}cm^{-2}eV^{-1}$.

• Journal of the Korean Vacuum Society
• /
• v.20 no.2
• /
• pp.93-99
• /
• 2011

We investigated how the surface roughness of electrode affects the charge injection at the pentacene/Au interface. After depositing Au film on the Si substrate by sputtering, we annealed the sample to control the Au surface roughness. Pentacene and Au top electrode were subsequently deposited to complete the sample. The nucleation density of pentacene was slightly higher on the rougher Au electrode, but surface morphologies of thick pentacene films were similar on both the as-prepared and the roughened Au electrodes. The current-voltage curves obtained from the Au/pentacene/Au structure measured as a function of temperature indicated that the interface barrier was higher for the rougher Au bottom-electrode. We propose that the higher barrier was caused by the lower work function of rougher electrode surface and the higher trap density at the interface.

• Journal of Adhesion and Interface
• /
• v.21 no.3
• /
• pp.86-92
• /
• 2020

We confirmed the effects on the device performances and the charge injection characteristics of organic field-effect transistor (OFET) by selectively differently controlling the surface energies on the contact region of the substrate where the source/drain electrodes are located and the channel region between the two electrodes. When the surface energies of the channel and contact regions were kept low and increased, respectively, the field-effect mobility of the OFET devices was 0.063 ㎠/V·s, the contact resistance was 132.2 kΩ·cm, and the subthreshold swing was 0.6 V/dec. They are the results of twice and 30 times improvements compared to the pristine FET device, respectively. As the results of analyzing the interfacial trap density according to the channel length, a major reason of the improved device performances could be anticipated that the pi-pi overlapping direction of polymer semiconductor molecules and the charge injection pathway from electrode is coincided by selective surface treatment in the contact region, which finally induces the decreases of the charge trap density in the polymer semiconducting film. The selective surface treatment method for the contact region between the electrode and the polymer semiconductor used in this study has the potential to maximize the electrical performances of organic electronics by being utilized with various existing processes to lower the interface resistance.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2012.02a
• /
• pp.470-470
• /
• 2012

Organic thin film transistors (OTFTs) backplane constitute the active elements in new generations of plastic electronic devices for flexible display. The overall OTFTs performance is largely depended on the properties and quality of each layers of device material. In solution based process of organic semiconductors (OSCs), the interface state is most impediments to preferable performance. Generally, a threshold voltage (Vth) shift is usually exhibited when organic gate insulators (OGIs) are exposed in an ambient air condition. This phenomenon was caused by the absorbed polar components (i.e. oxygen and moisture) on the interface between OGIs and Soluble OSCs during the jetting process. For eliminating the polar component at the interface of OGI, the role of high vacuum seasoning on an OGI for all solution processable OTFTs were studied. Poly 4-vinly phenols (PVPs) were the material chosen as the organic gate dielectric, with a weakness in ambient air. The high vacuum seasoning of PVP's surface showed improved performance from non-seasoning TFT; a $V_{th}$, a ${\mu}_{fe}$ and a interface charge trap density from -8V, $0.018cm^2V^{-1}s^{-1}$, $1.12{\times}10^{-12}(cm^2eV)^{-1}$ to -4.02 V, $0.021cm^2V^{-1}s^{-1}$, $6.62{\times}10^{-11}(cm^2eV)^{-1}$. These results of OTFT device show that polar components were well eliminated by the high vacuum seasoning processes.

• Korean Journal of Materials Research
• /
• v.12 no.9
• /
• pp.724-728
• /
• 2002

Inductively-coupled $N_2$O plasma was utilized to grow silicon dioxide at low temperature and applied to fabricate polycrystalline-silicon thin film transistors. At $400^{\circ}C$, the thickness of oxide was limited to 5nm and the oxide contained Si≡N and ≡Si-N-Si≡ bonds. The nitrogen incorporation improved breakdown field to 10MV/cm and reduced the interface charge density to $1.52$\times$10^{11}$ $cm^2$ with negative charge. The $N_2$O plasma gate oxide enhanced the field effect mobility of polycrystalline thin film transistor, compared to $O_2$ plasma gate oxide, due to the reduced interface charge at the $Si/SiO_2$ interface and also due to the reduced trap density at Si grain boundaries by nitrogen passivation.

• Korean Journal of Materials Research
• /
• v.19 no.1
• /
• pp.37-43
• /
• 2009

Silicon dioxide as gate dielectrics was grown at $400^{\circ}C$ on a polycrystalline Si substrate by inductively coupled plasma oxidation using a mixture of $O_2$ and $N_2O$ to improve the performance of polycrystalline Si thin film transistors. In conventional high-temperature $N_2O$ annealing, nitrogen can be supplied to the $Si/SiO_2$ interface because a NO molecule can diffuse through the oxide. However, it was found that nitrogen cannot be supplied to the Si/$SiO_2$ interface by plasma oxidation as the $N_2O$ molecule is broken in the plasma and because a dense Si-N bond is formed at the $SiO_2$ surface, preventing further diffusion of nitrogen into the oxide. Nitrogen was added to the $Si/SiO_2$ interface by the plasma oxidation of mixtures of $O_2/N_2O$ gas, leading to an enhancement of the field effect mobility of polycrystalline Si TFTs due to the reduction in the number of trap densities at the interface and at the Si grain boundaries due to nitrogen passivation.

• Korean Journal of Materials Research
• /
• v.29 no.8
• /
• pp.463-468
• /
• 2019

The electrical and interfacial properties of $HfO_2/Al_2O_3$ and $Al_2O_3/HfO_2$ dielectrics on AlN/p-Ge interface prepared by thermal atomic layer deposition are investigated by capacitance-voltage(C-V) and current-voltage(I-V) measurements. In the C-V measurements, humps related to mid-gap states are observed when the ac frequency is below 100 kHz, revealing lower mid-gap states for the $HfO_2/Al_2O_3$ sample. Higher frequency dispersion in the inversion region is observed for the $Al_2O_3/HfO_2$ sample, indicating the presence of slow interface states A higher interface trap density calculated from the high-low frequency method is observed for the $Al_2O_3/HfO_2$ sample. The parallel conductance method, applied to the accumulation region, shows border traps at 0.3~0.32 eV for the $Al_2O_3/HfO_2$ sample, which are not observed for the $Al_2O_3/HfO_2$ sample. I-V measurements show a reduction of leakage current of about three orders of magnitude for the $HfO_2/Al_2O_3$ sample. Using the Fowler-Nordheim emission, the barrier height is calculated and found to be about 1.08 eV for the $HfO_2/Al_2O_3$ sample. Based on these results, it is suggested that $HfO_2/Al_2O_3$ is a better dielectric stack than $Al_2O_3/HfO_2$ on AlN/p-Ge interface.

• Journal of Adhesion and Interface
• /
• v.21 no.4
• /
• pp.129-134
• /
• 2020

Understanding charge trapping at the interface between conjugated semiconductor and polymer dielectric basically gives insight into the development of long-term stable organic field-effect transistors (OFET). Here, the charge transport properties of OFETs using polymer dielectric with various molecular weights (MWs) have been investigated. The conjugated semiconductor, pentacene exhibited morphology and crystallinity, insensitive to MWs of polymethyl methacrylate (PMMA) dielectric. Consequently, transfer curves and field-effect mobilities of as-prepared devices are independent of MWs. Under bias stress in humid environment, however, the drain current decay as well as transfer curve shift are found to increase as the MW of PMMA decreases (MW effect). The charge trapping induced by MW effect is irreversible, that is, the localized charges are difficult to be delocalized. The MW effect is caused by the variation in the density of polymer chain ends in the PMMA: the free volumes at the PMMA chain ends act as charge trap sites, corresponding to drain current decay depending on MWs of PMMA.

• Proceedings of the KIEE Conference
• /
• 1998.11c
• /
• pp.737-739
• /
• 1998

Gate insulators using various fluoride films were investigated for thin film transistor applications. Conventional oxide containing materials exhibited high interface states, high $D_{it}$ gives an increased threshold voltage and poor stability of TFT. To improve TFT performances, we must reduce interface trap charge density between Si and gate insulator. In this paper, we investigated gate insulators such as such as $CaF_2$, $SrF_2$, $MgF_2$ and $BaF_2$. These materials exhibited an improvement in lattice mismatch, difference in thermal expansion coefficient, and electrical stability MIM and MIS devices were employed for an electrical characterization and structural property examination. Among the various fluoride materials, $CaF_2$ film showed an excellent lattice mismatch of 0.737%, breakdown electric field higher than 1.7MV/cm and leakage current density of $10^{-6}A/cm^2$. This paper probes a possibility of new gate insulator material for TFT application.