• ETRI Journal
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• v.30 no.5
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• pp.644-652
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• 2008

In this paper, a low-power CMOS interface circuit is designed and demonstrated for capacitive sensor applications, which is implemented using a standard 0.35-${\mu}m$ CMOS logic technology. To achieve low-power performance, the low-voltage capacitance-to-pulse-width converter based on a self-reset operation at a supply voltage of 1.5 V is designed and incorporated into a new interface circuit. Moreover, the external pulse signal for the reset operation is made unnecessary by the employment of the self-reset operation. At a low supply voltage of 1.5 V, the new circuit requires a total power consumption of 0.47 mW with ultra-low power dissipation of 157 ${\mu}W$ of the interface-circuit core. These results demonstrate that the new interface circuit with self-reset operation successfully reduces power consumption. In addition, a prototype wireless sensor-module with the proposed circuit is successfully implemented for practical applications. Consequently, the new CMOS interface circuit can be used for the sensor applications in ubiquitous sensor networks, where low-power performance is essential.

• ETRI Journal
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• v.46 no.5
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• pp.878-889
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• 2024

To expand the scale of spiking neural networks (SNNs), an interface circuit that supports multiple SNN cores is essential. This circuit should be designed using an asynchronous approach to leverage characteristics of SNNs similar to those of the human brain. However, the absence of a global clock presents timing issues during implementation. Hence, we propose an intermediate latching template to establish asynchronous nonlinear connectivity with multipipeline processing between multiple SNN cores. We design arbitration and distribution blocks in the interface circuit based on the proposed template and fabricate an interface circuit that supports four SNN cores using a full-custom approach in a 28-nm CMOS (complementary metal-oxide-semiconductor) FDSOI (fully depleted silicon on insulator) process. The proposed template can enhance throughput in the interface circuit by up to 53% compared with the conventional asynchronous template. The interface circuit transmits spikes while consuming 1.7 and 3.7 pJ of power, supporting 606 and 59 Mevent/s in intrachip and interchip communications, respectively.

• 전기의세계
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• v.26 no.6
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• pp.41-47
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• 1977

The paper deals with the fundamental specification for the physical implementation of interface circuit, which will play an important role in information and signal trammission between computer and controlled system, and also we have proved that the digital contoller will be able to improve the data handling of interface circuit.

• Proceedings of the IEEK Conference
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• 1999.06a
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• pp.749-752
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• 1999

A new interface circuit for variable resistive sensors is proposed. The interface circuit compose of only two strain gages, a voltage-to-current converter, and current mirror with two outputs. A new dual slope A/D converter based on linear operational transconductance amplifier for the testing of prototype interface circuit is also described. The theory of operation is presented and experimental results are used to verify the theoretical predictions. The results show close agreement between predicted behaviour and experimental performance.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.56 no.6
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• pp.1087-1091
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• 2007

Exact impedance modeling of the electrode/electrolyte interface is important in bio-signal sensing electrode development. Therefore, the investigation of the equivalent circuit models for the interface has been pursued for a long time by several researchers. Previous circuit models fit the experimental results in limited conditions such as frequency range, type of electrode, or electrolyte. This paper describes a new electrical circuit model and its capability of fitting the experimental results. The proposed model consists of three resistors and two constant phase elements. Electrochemical impedance spectroscopy was used to characterize the interface for Au, Pt, and stainless steel electrode in 0.9% NaCl solution. Both the proposed model and the previous model were applied to fit the measured impedance results for comparison. The proposed model fits the experimental data more accurately than other models especially at the low frequency range, and it enables us to predict the impedance at very low frequency range, including DC, using the proposed model.

• ETRI Journal
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• v.29 no.1
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• pp.70-78
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• 2007

A new low-voltage CMOS interface circuit with digital output for piezo-resistive transducer is proposed. An input current sensing configuration is used to detect change in piezo-resistance due to applied pressure and to allow low-voltage circuit operation. A simple 1-bit first-order delta-sigma modulator is used to produce an output digital bitstream. The proposed interface circuit is realized in a 0.35 ${\mu}m$ CMOS technology and draws less than 200 ${\mu}A$ from a single 1.5 V power supply voltage. Simulation results show that the circuit can achieve an equivalent output resolution of 9.67 bits with less than 0.23% non-linearity error.

• Proceedings of the KIEE Conference
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• 1996.11a
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• pp.419-421
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• 1996

We propose the digitized pressure sensor and the interface circuit to read directly the pressure signal in the digital form. The interface circuit has the control clock, comparator, and bit value decision circuit. The digitized sensor and interface circuit are integrated on the one chip using the post processing after IC fabrication. The dimension of the fabricated digitized pressure sensor is $3{\times}6{\times}1mm^3$.

• The KIPS Transactions:PartA
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• v.9A no.1
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• pp.53-60
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• 2002

This paper describes a Gray Mode Graphic STN LCD drive circuit using USB interface. The drive circuit using USB interface can highly transfer image data created under PC t LCD. Hence, the LCD drive circuit doesn't use microprocessor for the convenience of users. The proposed LCD drive circuit part have been verified by simulation and by ALTERA EPF10K10TC144-3 FPGA implementation in VHDL. The USB interface part have been programmed in MS-Visual C++ 6.0. The validity and efficiency of the proposed LCD drive circuit have been verified by test board. After comparing this LCD drive circuit to specify it was verified that the developed LCD drive circuit showed good performances, such as convenience of users, low cost.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.25 no.8
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• pp.1130-1133
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• 2021

In this paper, a miniaturized sensor interface circuit for the respiration detection system is proposed. Respiratory diagnosis is one of the main ways to predict various diseases. The proposed system consists of respiration detection sensor, temperature sensor, and interface circuits. Electrochemical type gas sensor using solid electrolytes is adopted for respiration detection. Proposed system performs sensing, amplification, analog-to-digital conversion, digital signal processing, and i2c communication. And also proposed system has a small form factor and low-cost characteristics through optimization and miniaturization of the circuit structure. Moreover, technique for sensor degradation compensation is introduced to obtain high accuracy. The size of proposed system is about 1.36 cm².

• The Journal of the Korea institute of electronic communication sciences
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• v.14 no.3
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• pp.529-536
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• 2019

In order to apply a piezoelectric energy harvester to a smart sensor system, an energy harvest interface circuit including an AC-DC rectifier is required. In this paper, we compared the performance of full bridge rectifier, which is a typical energy harvester interface circuit, and synchronous piezoelectric energy harvest interface circuit by using board-level simulation. As a result, the output power of a synchronous electric charge extraction(: SECE) circuit is about four times larger than that of the full bridge rectifier, and there is little load variation. And a high voltage comparator, which is essential for the SECE circuit for the piezoelectric energy harvester with an output voltage of 40V or more, was designed using 0.35 um BCD process. The SECE circuit using the designed high-voltage comparator proved that the output power is 427 % higher than the FBR circuit.