• International Journal of Fuzzy Logic and Intelligent Systems
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• v.4 no.1
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• pp.50-55
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• 2004

We propose an intgrated Gill environment system having only integer fuzzy operations in the consequent part and the defuzzification stage. In this paper, we also propose an integrated Gill environment system with 4 parallel fuzzy processing units to be operated in parallel on the classification of the sensed image data. In this, we solve the problems of taking longer times as the fuzzy real computations of [0, 1] by using the integer pixel conversion algorithm to convert lines of each fuzzy linguistic term to the closest integer pixels. This procedure is performed automatically in the GUI application program. As a Gill environment, PCI transmission, image data pre-processing, integer pixel mapping and fuzzy membership tuning are considered. This system can be operated in parallel manner for MIMO or MISO systems.

• Communications of the Korean Mathematical Society
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• v.12 no.1
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• pp.69-73
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• 1997

We show that if T is an $\varepsilon$-approximate Jordan functional such that T(a) = 0 implies $T(a^2) = 0 (a \in A)$ then T is continuous and $\Vert T \Vert \leq 1 + \varepsilon$. Also we prove that every $\varepsilon$-near Jordan mapping is an $g(\varepsilon)$-approximate Jordan mapping where $g(\varepsilon) \to 0$ as $\varepsilon \to 0$ and for every $\varepsilon > 0$ there is an integer m such that if T is an $\frac {\varepsilon}{m}$-approximate Jordan mapping on a finite dimensional Banach algebra then T is an $\varepsilon$-near Jordan mapping.

• Bulletin of the Korean Mathematical Society
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• v.51 no.1
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• pp.207-211
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• 2014

The aim of this paper is to prove the next result. Let n > 1 be an integer and let R be a n!-torsion free semiprime ring. Suppose that f : R ${\rightarrow}$ R is an additive mapping satisfying the relation [f(x), $x^n$] = 0 for all $x{\in}R$. Then f is commuting on R.

• Proceedings of the Korean Institute of Intelligent Systems Conference
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• 2003.05a
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• pp.299-302
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• 2003

In fuzzy control systems having large volumes of fuzzy data. one of the important problems is the improvement of execution speed in the fuzzy inference and defuzzification stages. In this paper, to improve the speedup of fuzzy controllers, we use an integer line mapping algorithm to convert [0, 1] real values in the fuzzy membership functions to integer pixels. U sing this, we propose a real-time high-speed fuzzy control system and implement a fast fuzzy processor and control system using FPGAs.

• Journal of Communications and Networks
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• v.13 no.6
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• pp.612-620
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• 2011

Recently, one of the problems with the Internet is the issue of scalability. To this end, locator/identifier separation protocol (LISP), which separates end-system identifiers and routing locators, has been proposed as a solution. In the LISP deployed network, the ingress and egress nodes of inter-AS traffic is determined by edge router selection (ERS) and endpoint identifier-routing locator mapping assignment (ERMA). In this paper, joint optimizations of ERS and ERMA for stub networks with and without predetermined link weights are studied and the mixed integer linear programming (MILP) formulations for the problems are given. To make the problem with optimizable link weights tractable, a revised local search algorithm is also proposed. Simulation results show that joint optimization of ERS and ERMA enables better network performance.

• International Journal of Fuzzy Logic and Intelligent Systems
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• v.6 no.3
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• pp.223-231
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• 2006

In high-speed fuzzy control systems applied to intelligent systems such as robot control, one of the most important problems is the improvement of the execution speed of the fuzzy inference. In particular, it is more important to have high-speed operations in the consequent part and the defuzzification stage. To improve the speedup of fuzzy controllers for intelligent systems, this paper presents an integer line mapping algorithm to convert [0, 1] real values of the fuzzy membership functions in the consequent part to a $400{\times}30$ grid of integer values. In addition, this paper presents a method of eliminating the unnecessary operations of the zero items in the defuzzification stage. With this representation, a center of gravity method can be implemented with only integer additions and one integer division. The proposed system is analyzed in the air conditioner control system for execution speed and COG, and applied to the truck backer-upper control system. The proposed system shows a significant increase in speed as compared with conventional methods with minimal error; simulations indicate a speedup of an order of magnitude. This system can be applied to real-time high-speed intelligent systems such as robot arm control.

• Journal of the Korea Society of Computer and Information
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• v.14 no.1
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• pp.135-143
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• 2009

Recently, in the mobile device, the increase of the need for encoding and decoding of high-resolution images requires an efficient implementation of the image codec. This paper proposes a time-optimized color conversion method for the JPEG decoder, which reduces the number of calculations in the color conversion by the rearrangement of arithmetic operations being possible due to the linearity of the IDCT and the color conversion matrices and brings down the time complexity of the color conversion itself by the integer mapping replacing floating-point operations to the optimal fixed-point shift and addition operations, eventually reducing the time complexity of the JPEG decoder. And the proposed method compensates a decline of image quality incurred by the quantification error of the operation arrangement and the integer mapping by using the multi-mode chrominance reconstruction. The performance evaluation performed on the development platform of embedded systems showed that, compared to previous color conversion methods, the proposed method greatly reduces the image decoding time, minimizing the distortion of decoded images.

• Journal of the Chungcheong Mathematical Society
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• v.31 no.4
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• pp.397-409
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• 2018

In this paper, we investigate the generalized Hyers-Ulam stability of the functional equation $$f\({\sum\limits_{i=1}^{n}}x_i\)+{\sum\limits_{1{\leq}i<j{\leq}n}}f(x_i-x_j)-n{\sum\limits_{i=1}^{n}f(x_i)=0$$ for integer values of n such that $n{\geq}2$, where f is a mapping from a vector space V to a Banach space Y.

• Proceedings of the IEEK Conference
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• 2003.11a
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• pp.473-476
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• 2003

We suggest 2 dimensional Fast Fourier Transform using Polynomial Transform and integer Fast Fourier Transform. Unlike conventional 2D-FFT using the direct quantization of twiddle factor, the suggested 2D-FFT adopts implemented by the lifting so that the suggested 2D-FFT is power adaptable and reversible. Since the suggested FFT performg integer-to-integer mapping, the transform can be implemented by only bit shifts and auditions without multiplications. In addition. polynomial transform severely reduces the multiplications of 2D-FFT. While preserving the reversibility, complexity of this algorithm is shown to be much lower than that of any other algorithms in terms of the numbers of additions and shifts.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.47 no.10
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• pp.36-42
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• 2010

FFT(Fast Fourier Transform) processor is one of the key components in the implementation of OFDM systems for many wireless standards such as IEEE 802.22. To improve the performances of FFT processors, various studies have been carried out to reduce the complexities of multipliers, memory interface, control schemes and so on. While the number of FFT stages increases logarithmically $log_2N$) as the FFT point-size (N) increases, the number of required registers (or, memories) increases linearly. In large point-size FFT designs, the registers occupy more than 70% of the chip area. In this paper, to reduce the memory size of IFFT for OFDM transmitters, we propose a new IFFT design method based on a combined mapping of modulated data, pilot and null signals. The proposed method focuses on reducing the sizes of the registers in the first two stages of the IFFT architectures since the first two stages require 75% of the total registers. By simulations of 2048-point IFFT design for cognitive radio systems, it is shown that the proposed IFFT design method achieves more than 38.5% area reduction compared with previous IFFT designs.