• Journal of the Microelectronics and Packaging Society
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• v.30 no.1
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• pp.63-70
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• 2023

Today, the importance of power semiconductors continues to increase due to serious environmental pollution and the importance of energy. Particularly, SiC-MOSFET, which is one of the wide bandgap (WBG) devices, has excellent high voltage characteristics and is very important. However, since the electrical properties of SiC-MOSFET are heatsensitive, thermal management through a package is necessary. In this paper, we propose an insulated metal substrate (IMS) method rather than a direct bonded copper (DBC) substrate method used in conventional power semiconductors. IMS is easier to process than DBC and has a high coefficient of thermal expansion (CTE), which is excellent in terms of cost and reliability. Although the thermal conductivity of the dielectric film, which is an insulating layer of IMS, is low, the low thermal conductivity can be sufficiently overcome by allowing a process to be very thin. Electric-thermal co-simulation was carried out in this study to confirm this, and DBC substrate and IMS were manufactured and experimented for verification.

• International Journal of Internet, Broadcasting and Communication
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• v.7 no.2
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• pp.161-167
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• 2015

The performance of high power LEDs highly depends on the junction temperature. Operating at high junction temperature causes elevation of the overall thermal resistance which causes degradation of light intensity and lifetime. Thus, appropriate thermal management is critical for LED packaging. The main goal of this research is to improve thermal resistance by optimizing and comparing nano-pore silicon-based thermal substrate to insulated metal substrate and direct bonded copper thermal substrate. The thermal resistance of the packages are evaluated using computation fluid dynamic approach for 1 W single chip LED module.

• Journal of the Microelectronics and Packaging Society
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• v.24 no.4
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• pp.39-46
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• 2017

This paper presents the fabrication of ceramic insulation layer on metallic heat spreading substrate, i.e. an insulated metal substrate, for planar type heater. Aluminum alloy substrate is preferred as a heat spreading panel due to its high thermal conductivity, machinability and the light weight for the planar type heater which is used at the thermal treatment process of semiconductor device and display component manufacturing. An insulating layer made of ceramic dielectric film that is stable at high temperature has to be coated on the metallic substrate to form a heating element circuit. Two technical issues are raised at the forming of ceramic insulation layer on the metallic substrate; one is delamination and crack between metal and ceramic interface due to their large differences in thermal expansion coefficient, and the other is electrical breakdown due to intrinsic weakness in dielectric or structural defects. In this work, to overcome those problem, selected metal oxide buffer layers were introduced between metal and ceramic layer for mechanical matching, enhancing the adhesion strength, and multi-coating method was applied to improve the film quality and the dielectric breakdown property.

• Journal of Power Electronics
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• v.9 no.3
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• pp.464-471
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• 2009

This paper introduces a new Motion-$SPM^{TM}$ (Smart Power Modules) module in Single In-line Package (SIP), which is a fully optimized intelligent integrated IGBT inverter module for up to 1kW low power motor drive applications. This module offers a sophisticated, integrated solution and tremendous design flexibility. It also takes advantage of pliability for the arrangement of heat-sink due to two types of lead forms. It comes to be realized by employing non-punch-through (NPT) IGBT with a fast recovery diode and highly integrated building block, which features built-in HVICs and a gate driver that offers more simplicity and compactness leading to reduced costs and high reliability of the entire system. This module also provides technical advantages such as the optimized cost effective thermal performances through IMS (Insulated Metal Substrate), the high latch immunity. This paper provides an overall description of the Motion-$SPM^{TM}$ in SIP as well as actual application issues such as electrical characteristics, thermal performance, circuit configurations and power ratings.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.477-477
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• 2008

For more than three decades, the gate dielectrics in CMOS devices are $SiO_2$ because of its blocking properties of current in insulated gate FET channels. As the dimensions of feature size have been scaled down (width and the thickness is reduced down to 50 urn and 2 urn or less), gate leakage current is increased and reliability of $SiO_2$ is reduced. Many metal oxides such as $TiO_2$, $Ta_2O_4$, $SrTiO_3$, $Al_2O_3$, $HfO_2$ and $ZrO_2$ have been challenged for memory devices. These materials posses relatively high dielectric constant, but $HfO_2$ and $Al_2O_3$ did not provide sufficient advantages over $SiO_2$ or $Si_3N_4$ because of reaction with Si substrate. Recently, $HfO_2$ have been attracted attention because Hf forms the most stable oxide with the highest heat of formation. In addition, Hf can reduce the native oxide layer by creating $HfO_2$. However, new gate oxide candidates must satisfy a standard CMOS process. In order to fabricate high density memories with small feature size, the plasma etch process should be developed by well understanding and optimizing plasma behaviors. Therefore, it is necessary that the etch behavior of $HfO_2$ and plasma parameters are systematically investigated as functions of process parameters including gas mixing ratio, rf power, pressure and temperature to determine the mechanism of plasma induced damage. However, there is few studies on the the etch mechanism and the surface reactions in $BCl_3$ based plasma to etch $HfO_2$ thin films. In this work, the samples of $HfO_2$ were prepared on Si wafer with using atomic layer deposition. In our previous work, the maximum etch rate of $BCl_3$/Ar were obtained 20% $BCl_3$/ 80% Ar. Over 20% $BCl_3$ addition, the etch rate of $HfO_2$ decreased. The etching rate of $HfO_2$ and selectivity of $HfO_2$ to Si were investigated with using in inductively coupled plasma etching system (ICP) and $BCl_3/Cl_2$/Ar plasma. The change of volume densities of radical and atoms were monitored with using optical emission spectroscopy analysis (OES). The variations of components of etched surfaces for $HfO_2$ was investigated with using x-ray photo electron spectroscopy (XPS). In order to investigate the accumulation of etch by products during etch process, the exposed surface of $HfO_2$ in $BCl_3/Cl_2$/Ar plasma was compared with surface of as-doped $HfO_2$ and all the surfaces of samples were examined with field emission scanning electron microscopy and atomic force microscope (AFM).