• 전력전자학회논문지
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• 제20권4호
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• pp.375-387
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• 2015

This study investigates an economic and highly efficient power-converter topology and its modulation scheme for 60 kW rapid EV charger system. The target system is a three-phase three-switch buck-type rectifier topology. A new carrier-based PWM scheme, which is characterized by simple implementation using logic gates, is introduced in this paper. This PWM scheme replaces the diode rectifier equivalent switching state with an active switching state to produce the same effective current flowing path. As a result, the distortion of input current during the polarity reversal of capacitor line voltage can be mitigated. The proposed modulation technique is confirmed through simulation verification. The proposed modulation technique and its implementation scheme can expand the operation range of the three-phase three-switch buck-type rectifier with high-quality AC input and capacitor ripple current.

• 전력전자학회논문지
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• 제5권2호
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• pp.154-162
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• 2000

본 논문에서는 3상 강압형 다이오드 정류기에서 출력전압의 저주파 리플 전압을 감소시키기 위한 새로운 제어기법을 제안한다. 제안한 펄스 주파수 변조 기법은 강압형 다이오드 정류기의 출력전압과 넓은 부하 범위에 대한 주 스위치의 영전류 스위칭을 보장하기 위해 적용된다. 본 논문에서 적용된 펄스 주파수 변조 기법은 일반적으로 입력전류의 낮은 고조파의 단위 역률의 장점을 지니고 있다. 또한 출력전압에서 보여진 저주파 리플전압을 감소시키기 위해 효과적으로 사용되어진다. 제안된 제어기법을 자세하게 설명하며 그 타당성을 검증하기 위해 시뮬레인션 및 실험을 통하여 검증한다.

• 조명전기설비학회논문지
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• 제18권4호
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• pp.41-48
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• 2004

이 논문에서 정 전압형 PFC 전자식 안정기에 대하여 제안하였다. 제안하는 PFC 전자식 안정기는 고효율 승압형 컨버터와 기존의 하프브리지 인버터를 조합한 것이다. 제안된 PFC 전자식 안정기는 전압 분압기와 소프트 스위칭기술을 사용하여 입력전류의 왜형과 입력전류의 고조파가 감소됨을 증명하였다. 형광램프에 대한 시뮬레이션결과는 이론적인 분석과 일치함을 나타내었다.

• Journal of Power Electronics
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• 제9권2호
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• pp.173-179
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• 2009

This paper proposes a new three-phase diode rectifier system with a sinusoidal input current at unity power factor and a regulated and isolated output voltage at low level. The inherent natural wave-shaping capability of the reduced kVA polyphase transformer together with an active current wave-shaping technique results in a significant reduction of input and output filter requirements associated with switching ripple and EMI. The operation principles are described along with a design example and a comparative evaluation. Experimental results on a 1.5kW prototype are provided to validate the proposed concept.

• Journal of Power Electronics
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• 제14권5호
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• pp.899-907
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• 2014

This paper proposes a single-phase bidirectional AC/DC converter topology applied in V2G systems, which consists of an inverter and a bidirectional non-inverting buck-boost converter. This topology can operate in four modes: buck charging, boost charging, buck discharging and boost discharging with high input current quality and unity input power factor. The inverter switches at line frequency, which is different from conventional voltage source inverters. A bidirectional buck-boost converter is utilized to adapt to a wider charging voltage range. The modulation and control strategy is introduced in detail, and the switching patterns are optimized to reduce the current ripple. In addition, the semiconductor losses are analyzed. Simulation and experimental results demonstrate the validity and effectiveness of the proposed topology.

• 한국조명전기설비학회:학술대회논문집
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• 한국조명전기설비학회 2003년도 학술대회논문집
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• pp.343-348
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• 2003

In this paper, a PFC(Power Factor Correction) electronic ballast with constant voltage-fed is proposed. The proposed PFC electronic ballast is combined of a High-efficiency boost converter and a conventional half bridge inverter. It is proved that the ripple of input-current and the input-current's harmonic of the proposed PFC electronic ballast are reduced using the voltage divider and soft-switching technique. It is demonstrated that simulation results for 40[W] fluorescent lamp correspond with theoretical analysis

• 조명전기설비학회논문지
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• 제20권1호
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• pp.34-40
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• 2006

본 논문에서는 포워드형 3상 PWM 정류기를 이용한 새로운 DC 48[V] 통신용 전원시스템을 제안하여 역률과 효율, 리플 전압의 개선에 관하여 서술하였다. 제안된 DC 48[V] 통신용 전원시스템은 각 선간에 스위치와 인덕터 그리고 콘덴서가 조합된 전력변환장치로 구성되며, 전력변환장치내의 각 스위치의 턴-온시 제어 주기내의 도통시간을 조정하여 역률 1의 정현파 전류를 얻었다. 그리고 일반적인 PWM 정류기를 포워드 형태의 PWM 정류기로 구성함으로써 스위치의 온-오프시 발생되는 피크 전류를 작게 하여 변환 효율 92.1[%]을 얻었다. 또한 고조파 입력전류 규제값(IEC61000-3-2 Class-A)을 만족하는 입력 전류를 가지며, 3상 전원의 왜곡이 중첩되는 상태에서도 출력 전압의 맥동성분을 저감시켰다.

• 전력전자학회:학술대회논문집
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• 전력전자학회 1999년도 전력전자학술대회 논문집
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• pp.278-281
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• 1999

In a utility interactive photovoltaic system, a PWM inverter is used for the connection between the photovoltaic arrays and the utility. The DC current becomes pulsated causes the distortion of the AC current waveform. This paper presents the reduced pulsation of DC input current by operating the inverter with buck-boost chopper in the discontinuous conduction mode. The DC current with contains harmonics component is analyzed by means of separating into two terms of a ripple component and a direct component. The constant DC current without pulsation is supplied from photovoltaic array to the inverter. The proposed inverter system provide a sinusoidal AC current for domestic loads and the utility line with unity power factor.

• 대한전기학회논문지:전기기기및에너지변환시스템부문B
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• 제48권9호
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• pp.517-522
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• 1999

This paper addresses the issue of current sampling in a high performance AC drive system fed by a discontinuous PWM inverter. The effect of the sampling error due to the measurement delay produced by an input stage low pass filter and an A/D converter is described in the case of discontinuous PWM. To compensate for the sampling error, a method to estimate the delay time of the whole measurement system based on the measured current is proposed and its effectiveness is verified by experimental results. The proposed algorithm can automatically estimate the system delay introduced by the low pass filter and the A/D converter at the commissioning stage. By delaying the current sampling by the estimated value, experimental results indicate that more than 50% reduction of current ripple can be achieved.

• Journal of Power Electronics
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• 제14권3호
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• pp.478-487
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• 2014

This study presents a new interleaved three-level zero-voltage switching (ZVS) converter for high-voltage and high-current applications. Two circuit cells are operated with interleaved pulse-width modulation in the proposed converter to reduce the current ripple at the input and output sides, as well as to decrease the current rating of output inductors for high-load-current applications. Each circuit cell includes one half-bridge converter and one three-level converter at the primary side. At the secondary side, the transformer windings of two converters are connected in series to reduce the size of the output inductor or switching current in the output capacitor. Based on the three-level circuit topology, the voltage stress of power switches is clamped at $V_{in}/2$. Thus, MOSFETs with 500 V voltage rating can be used at 800 V input voltage converters. The output capacitance of the power switch and the leakage inductance (or external inductance) are resonant at the transition interval. Therefore, power switches can be turned on under ZVS. Finally, experiments verify the effectiveness of the proposed converter.