• Title/Summary/Keyword: Input power level

Search Result 586, Processing Time 0.034 seconds

Numerical Simulation of a Vane Pump Characteristics of an Automotive Power Steering System Using Moving Mesh Technique (이동 격자를 이용한 Power Steering용 Vane Pump 유동 해석)

  • Lee, Sang-Hyuk;Hur, Nahm-Keon;Jin, Bong-Yong
    • 유체기계공업학회:학술대회논문집
    • /
    • 2006.08a
    • /
    • pp.459-462
    • /
    • 2006
  • In this study, the characteristic of a vane pump of an automative power steering system is numerically analyzed. The vane pump changes the energy level of operation fluid by converting mechanical input power to hydraulic output. To simulate this mechanism, moving mesh technique is adopted. As a result, the flow rate and pressure are obtained by numerical analysis. The flow rate agrees well with the experimental data. Moreover, the variation and oscillation of the pressure around the rotating vane are confirmed. The difference of pressure appears in the vane tip as a result of the flow characteristics. Furthermore, the back flow into the rotor was observed.

  • PDF

A High Efficiency Active Rectifier for 6.78MHz Wireless Power Transfer Receiver with Bootstrapping Technique and All Digital Delay-Locked Loop

  • Nga, Truong Thi Kim;Park, Hyung-Gu;Lee, Kang-Yoon
    • IEIE Transactions on Smart Processing and Computing
    • /
    • v.3 no.6
    • /
    • pp.410-415
    • /
    • 2014
  • This paper presents a new rectifier with a bootstrapping technique to reduce the effective drop voltage. An all-digital delay locked loop (ADDLL) circuit was also applied to prevent the reverse leakage current. The proposed rectifier uses NMOS diode connected instead of PMOS to reduce the design size and improve the frequency respond. All the sub-circuits of ADDLL were designed with low power consumption to reduce the total power of the rectifier. The rectifier was implemented in CMOS $0.35{\mu}m$ technology. The peak power conversion efficiency was 76 % at an input frequency of 6.78MHz and a power level of 5W.

Design of Fault Tolerant Control System for Steam Generator Using Fuzzy Logic

  • Kim, Myung-Ki;Seo, Mi-Ro
    • Proceedings of the Korean Nuclear Society Conference
    • /
    • 1998.05a
    • /
    • pp.321-328
    • /
    • 1998
  • A controller and sensor fault tolerant system jot a steam generator is designed with fuzzy logic. A structure of the : proposed fault tolerant redundant system is composed of a supervisor and two fuzzy weighting modulators. A supervisor alternatively checks a controlled and a sensor induced performances to identify Which Part, a controller or a sensor, is faulty. In order to analyze controller induced performance both an error and a charge in error of the system output an chosen as fuzzy variables. The fuzzy logic jot a sensor induced performance uses two variables : a deviation between two sensor outputs and its frequency, Fuzzy weighting modulator generates an output signal compensated for faulty input signal. Simulations show that the : proposed fault tolerant control scheme jot a steam generator regulates welt water level by suppressing fault effect of either controllers or sensors. Therefore through duplicating sensors and controllers with the proposed fault tolerant scheme, both a reliability of a steam generator control and sensor system and that of a power plant increase even mote.

  • PDF

Characteristics of High Power Semiconductor Device Losses in 5MW class PMSG MV Wind Turbines

  • Kwon, Gookmin;Lee, Kihyun;Suh, Yongsug
    • Proceedings of the KIPE Conference
    • /
    • 2014.07a
    • /
    • pp.367-368
    • /
    • 2014
  • This paper investigates characteristics of high power semiconductor device losses in 5MW-class Permanent Magnet Synchronous Generator (PMSG) Medium Voltage (MV) wind turbines. High power semiconductor device of press-pack type IGCT of 6.5kV is considered in this paper. Analysis is performed based on neutral point clamped (NPC) 3-level back-to-back type voltage source converter (VSC) supplied from grid voltage of 4160V. This paper describes total loss distribution at worst case under inverter and rectifier operating mode for the power semiconductor switches. The loss analysis is confirmed through PLECS simulations. In addition, the loss factors due to di/dt snubber and ac input filter are presented. The investigation result shows that IGCT type semiconductor devices generate the total efficiency of 97.74% under the rated condition.

  • PDF

Design of High Speed Switching Circuit for Pulsed Power Amplifier (Pulsed Power Amplifier를 위한 고속 스위칭 회로 설계)

  • Yi, Hui-Min;Hong, Sung-Yong
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
    • /
    • v.19 no.2
    • /
    • pp.174-180
    • /
    • 2008
  • The pulsed amplifier which switches the main supply voltage of RF amplifier according to input pulse signal has good efficiency and low noise level between pulses. And it has simple structure because it doesn't need a pulse modulator at input port. The pulsed amplifier using the conventional switching circuit has slow fall time compared to rise time. We proposed the novel switching circuit for improving the fall time of pulsed amplifier The proposed switching circuit is implemented by replacing FET of conventional circuit with BJT. As a result of appling this circuit to RF pulsed amplifier, the rise and fall time are 5.7 ns and 21.9 ns at 27 dBm output power, respectively.

Analysis and Design of a Single-Phase Tapped-Coupled-Inductor Boost DC-DC Converter

  • Gitau, Michael Njoroge;Mwaniki, Fredrick Mukundi;Hofsajer, Ivan W.
    • Journal of Power Electronics
    • /
    • v.13 no.4
    • /
    • pp.636-646
    • /
    • 2013
  • A single-phase tapped-inductor boost converter has been proposed previously. However, detailed characterization and performance analysis were not conducted. This paper presents a detailed characterization, performance analysis, and design expressions of a single-phase tapped-coupled-inductor boost converter. Expressions are derived for average and RMS input current as well as for RMS input and output capacitor current ripple. A systematic approach for sizing the tapped-coupled inductor, active switch, and output diode is presented; such approach has not been reported in related literature. This study reveals that sizing of the inductor has to be based on current ripple requirement, turns ratio, and load. Conditions that produce discontinuous inductor current are also discussed. Analysis of a non-ideal converter operating in continuous conduction mode is also conducted. The expression for the voltage ratio considering the coupling coefficient is derived. The suitability of the converter for high-voltage step-up applications is evaluated. Factors that affect the voltage boost ratio are also identified. The effects of duty ratio and load variation on the performance of the converter are also investigated. The theoretically derived characteristics are validated through simulations. Experimental results obtained at a low power level are included to validate the analytical and simulation results. A good agreement is observed among the analytical, simulation, and experimental results.

Macro-model for Estimation of Maximum Power Dissipation of CMOS Digital Gates (CMOS 디지털 게이트의 최대소모전력 예측 매크로 모델)

  • Kim, Dong-Wook
    • The Transactions of the Korean Institute of Electrical Engineers A
    • /
    • v.48 no.10
    • /
    • pp.1317-1326
    • /
    • 1999
  • As the integration ratio and operation speed increase, it has become an important problem to estimate the dissipated power during the design procedure as a method to reduce the TTM(time to market). This paper proposed a prediction model to estimate the maximum dissipated power of a CMOS logic gate. This model uses a calculational method. It was formed by including the characteristics of MOSFETs of which a CMOS gate consists, the operational characteristics of the gate, and the characteristics of the input signals. As the modeling process, a maximum power estimation model for CMOS inverter was formed first, and then a conversion model to convert a multiple input CMOS gate into a corresponding CMOS inverter was proposed. Finally, the power model for inverter was applied to the converted result so that the model could be applied to a general CMOS gate. For experiment, several CMOS gates were designed in layout level by $0.6{\mu}m$ layout design rule. The result by comparing the calculated results with those from HSPICE simulations for the gates showed that the gate conversion model has within 5% of the relative error rate to the SPICE and the maximum power estimation model has within 10% of the relative error rate. Thus, the proposed models have sufficient accuracies. Also in calculation time, the proposed models was more than 30 times faster than SPICE simulation. Consequently, it can be said that the proposed model could be used efficiently to estimate the maximum dissipated power of a CMOS logic gate during the design procedure.

  • PDF

A PWM Method for Single-Phase 3-Level High Power Rectifiers (단상 3레벨 대용량 정류기의 PWM방법)

  • Cho, S.J.;Song, J.H.;Kim, Y.D.;Choy, I;Yoo, J.Y.
    • Proceedings of the KIEE Conference
    • /
    • 1998.07f
    • /
    • pp.1937-1939
    • /
    • 1998
  • This paper presents a simple switching method to generate a PWM pattern mostly relevant to signle-phase three-level PWM rectifier. The adopted PWM switching pattern is performed in a manner similar to the space vector PWM method, which is popularly used in the three-phase rectifier and inverter. A set of possible voltages has been selected so that an equation with a time integral considered within a sampling period should be satisfied every sampling time. The simulation result shows that the proposed control scheme is good in some performance criteria such as unity power factor, low harmonic distortion of input current, dynamic response and voltage balancing of two series-connected DC capacitors.

  • PDF

Tolerance Control for the Inner Open-Switch Faults of a T-Type Three-Level Rectifier

  • Lee, June-Seok;Lee, Kyo-Beum
    • Journal of Power Electronics
    • /
    • v.14 no.6
    • /
    • pp.1157-1165
    • /
    • 2014
  • The T-type topology is a three-level topology that has an advantage in terms of its number of switching device and its efficiency when compared to the neutral-point clamped (NPC)-type topology. With the recent increase in the usage of the T-type topology, the interest in its reliability has also increased. Therefore, a tolerance control for a T-type rectifier is necessary to improve the reliability of applications when an open-switch fault occurs. NPC-type rectifiers cannot eliminate input current distortion completely. However, the T-type rectifier is able to restore distorted current. In this paper, a tolerance control for the $S_{x2}$ and $S_{x3}$ open-switch faults of a T-type rectifier is proposed where it is advantageous in terms of efficiency when compared with other tolerance controls. The performance of the proposed tolerance control is verified through simulation and experimental results.

Acoustic Field Analysis of Reverberant Water Tank using Acoustic Radiosity Method and Experimental Verification (음향라디오시티법을 이용한 잔향수조 음장 해석과 실험검증)

  • Kim, Kookhyun
    • Journal of the Society of Naval Architects of Korea
    • /
    • v.56 no.5
    • /
    • pp.464-471
    • /
    • 2019
  • The acoustic power is a major acoustical characteristic of an underwater vehicle and could be measured in a reverberant water tank. In order to obtain accurate measurement results, the acoustic field formed by the sound source should be investigated quantitatively in the reverberant water tank. In this research, the acoustic field of a reverberant water tank containing an underwater sound source has been analyzed by using an acoustic radiosity method one of the numerical analysis methods suitable for the acoustic analysis of the highly diffused space. The source level of the underwater sound source and acoustical properties of the water tank input to the numerical analysis have been estimated by applying the reverberant tank plot method through a preliminary experiment result. The comparison of the numerical analysis result with that of the experiment has verified the accuracy of the acoustic radiosity method.