• Proceedings of the KIEE Conference
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• 2007.07a
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• pp.933-934
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• 2007

We fabricated and tested a resistive type superconducting fault current limiter (SFCL) based on BSCCO-2212 bulk coils. Each bulk coils of the SFCL was designed to have the rated voltage of 220 $V_{rms}$ and the critical current($I_C$) of 320$\sim$340 A at 77K. Ten components in series, make the SFCL having the rated voltage of 2.2 $kV_{rms}$ for equal quench test. The fault test was conducted at an input voltage of 2.2 $kV_{rms}$ and fault current of 25 $kA_{rms}$. In addition, we examined the endurance characteristics for all bulk coils through repeat fault test. Test results shows that the SFCL successfully limited the fault current of 25$kA_{rms}$ to below $7{\sim}8kA_{p}$ within minimum 1.1msec after fault occurred. All bulk coils quenched together upon faults and shared the rated voltage evenly. The endurance test results show an equivalent among repeat fault test. During the quench process, average temperature of all bulk coils did not exceed 250 K, and the SFCL was totally safe during the whole operation.

• Journal of electromagnetic engineering and science
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• v.16 no.4
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• pp.241-247
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• 2016

This paper proposes the design and measurement of a 6-18 GHz front-end receiver module that has been combined into a one- channel output from a two-channel input for electronic warfare support measures (ESM) applications. This module includes a limiter, high-pass filter (HPF), power combiner, equalizer and amplifier. This paper focuses on the design aspects of reducing the noise figure (NF) and matching the phase and amplitude. The NF, linear equalizer, power divider, and HPF were considered in the design. A broadband receiver based on a combined configuration used to obtain low NF. We verify that our receiver module improves the noise figure by as much as 0.78 dB over measured data with a maximum of 5.54 dB over a 6-18 GHz bandwidth; the difference value of phase matching is within $7^{\circ}$ between ports.

• Proceedings of the Korea Institute of Applied Superconductivity and Cryogenics Conference
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• 2000.02a
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• pp.91-94
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• 2000

We fabricated resistive super- conducting fault current limiters (SFCL) based on YBCO thin films grown on 2" diameter $Al_{2}O_{3}$ substrates. Two SFCLs with nearly identical properties. two SFCLs with nearly identical properties were connected in series to investigate simultaneous quenching. There was a difference of several half cycles in their quench starting time, although the difference was not more than 0.1 msec when they were operated separately. This imbalance was removed by connecting a shunt resistor to an SFCL in parallel. Increased power input at high voltages also reduced the initial imbalance in power dissipation. Further efforts on the simultaneous quench in SFCLs connected in series are on the way through methods such as the artificial control of quench speed.peed.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.49 no.11
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• pp.737-741
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• 2000

We fabricated resistive superconducting fault current limiters (SFCL) based on YBCO thin films grown on 2-inch diameter $Al_2O_3$ substrates. Two SFCLs with nearly identical properties were connected in series to investigate simultaneous quench. There was a slight difference in the rate of voltage increase between two SFCL units when they were operated independently. This difference resulted in significantly imbalanced power dissipation between the units. This imbalance was removed by connecting a shunt resister to an SFCL in parallel. The appropriate values of shunt resistance were 80 ${\Omega}$ at 75 $V_rms$ and 110 ${\Omega}$ at 120 $V_rms$, respectively. Increased power input at high voltages also reduced the initial imbalance in power dissipation, but with increase in film temperature to higher than 200 K.

• Progress in Superconductivity and Cryogenics
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• v.9 no.3
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• pp.57-61
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• 2007

The current limiting characteristics of hybrid SFCL with additional power electronic devices was investigated in order to improve operation reliabilities. The hybrid SFCL developed consists of a superconducting trigger (S/T) part, a fast switch (F/S) module and a current limiting (C/L) part. Although hybrid SFCL had shown a excellent current limiting characteristics, this device was rather vulnerable to the residual arc currents which could exist during fast switch operation. This undesirable arc should be extinguished as quickly as possible in order to implement perfect fault current commutation. So, in order to eliminate the residual arcs between fast switch contacts, the power electronic devices (IGBT or GTO) were connected in series between the S/T part and the interrupter of the F/S module. According to the fault tests conducting with an input voltage of $270\;V_{rms}$ and a fault current of $5\;kA_{rms}$, The power electronic devices could perfectly remove the arc generated between the contacts of the interrupter within 4 ms after the fault occurred. From the test analysis, it was confirmed that the hybrid SFCL could enhance the operation reliability by adopting additional power electronic devices.

• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.43 no.8
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• pp.706-711
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• 2015

The fighter aircraft uses several different loading configurations for air-to-surface and air-to-air combat missions. To maintain wings-level flight with an asymmetric weapon configuration, a pilot controls a roll trim system. However, it is difficult to apply an accurate roll trim input for wings-level flight in the actual flight under disturbance. The inaccurate roll trim input degrades the performance of the roll autopilot system. In this paper, to solve this problem, an integrator was additionally designed in the command part of the roll autopilot system. The initial transient response was improved by scheduling the limiter to restrict the roll attitude error. As a result of the evaluation of the simulation for the designed flight control law, the roll attitude following performance was found to be improved in the autopilot system operation under the inaccurate roll trim condition.

• Korean Journal of Optics and Photonics
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• v.13 no.2
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• pp.146-150
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• 2002

1.55${\mu}{\textrm}{m}$ PnpN optical thyristor as a smart optical switch has potential applications in advanced optical communication systems. PnpP optical thyristors operating at 1.55${\mu}{\textrm}{m}$ are proposed and fabricated for the first time. In the optical thyristors, we employ InGaAs/InP multiple quantum well (MQW) for the active n- and p-layers. The thyristors show sufficiently nonlinear s-shape I-V characteristics and spontaneous emission. In the OFF-state, the device has a high-impedance up to switching voltage of 4.03(V). On the other hand, it has low-impedance and emits spontaneous light as a light-emitting diode in the ON-state voltage of 1.77(V), and switching voltage is changed under several light input conditions. It can be used as a header processor in optical asynchronous transfer mode (ATM), as a hard limiter in optical code division multiple access (CDMA) and as a wavelength converter in optical WDM systems.

• Proceedings of the KSRS Conference
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• 2005.10a
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• pp.493-496
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• 2005

The PMU (Payload Management Unit) in MSC (Multi-Spectral Camera) is the main subsystem for the management, control and power supply of the MSC payload operation. The PMU shall handle the communication with the BUS (Spacecraft) OBC (On Board Computer) for the command, the telemetry and the communications with the various MSC units. The PMU will perform that distributes power to the various MSC units, collects the telemetry reports from MSC units, performs thermal control of the EOS (Electro-Optical Subsystem), performs the NUC (Non-Uniformity Correction) function of the raw imagery data, and rearranges the pixel data and output it to the DCSU (Data Compression and Storage Unit). The BUS provides high voltage to the MSC. The PMU is connected to primary and redundant BUS power and distributes the high unregulated primary voltages for all MSC sub-units. The PSM (Power Supply Module) is an assembly in the PMU implements the interface between several channels on the input. The bus switches are used to prevent a single point system failure. Such a failure could need the PSS (Power Supply System) requirement to combine the two PSM boards' bus outputs in a wired-OR configuration. In such a configuration if one of the boards' output gets shorted to ground then the entire bus could fail thereby causing the entire MSC to fail. To prevent such a short from pulling down the system, the switch could be opened and disconnect the short from the bus. This switch operation is controlled by the BUS.

• Journal of Satellite, Information and Communications
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• v.7 no.3
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• pp.135-139
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• 2012

A digital controller can simply realize a complex operation algorithm and power control process which can not be applied by an analog circuit for a solar array regulator(SAR). The digital resistive control(DRC) makes an equivalent input impedance of the SAR be resistive characteristic. The resistance of the solar array varies largely in a voltage source region and slightly in a current source region. Therefore when the solar array regulator is controlled by the DRC, the Advanced Incremental Conductance MPPT Algorithm with a Variable Step Size(AIC-MPPT-VSS) is suitable. The AIC-MPPT-VSS, however, using small signal resistance and large signal resistance of the solar array can not limit the absolute value of the solar array power. In this paper, the solar array power limiter is suggested and the BUCK-BOOST type SAR which is fully controlled by the digital controller is verified by simulation.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.28 no.5
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• pp.430-433
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• 2017

This paper presents a S/C/X-band LNA MMIC with resistive feedback structure in 0.25 um GaN HEMT process. The GaN devices have advantages as a high output power device having high breakdown voltage, energy band gap and stability at high temperature. Since the receiver using the GaN device with high linearity can be implemented without a limiter, the noise figure of the receiver can be improved and the size of receiver module can be reduced. The proposed GaN LNA MMIC based on 0.25 um GaN HEMT device is achieved the gain of > 15 dB, the noise figure of < 3 dB, the input return loss of > 13 dB, and the output return loss of > 8 dB in the S/C/X-band. The current consumption of GaN LNA MMIC is 70 mA with the drain voltage 20 V and the gate voltage -3 V.