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적응 쌍선형 필터의 RPEM 알고리즘 (RPEM Algorithm for Adaptive Bilinear Filter)

  • 백흥기;황지원;안봉만
    • 전자공학회논문지B
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    • 제30B권3호
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    • pp.10-21
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    • 1993
  • Bilinear models are attractive for adaptive filtering applications because they can approximate a large class of nonlinear systems adequately, and usually with considerable parsimony in the number of coefficients compared with Volterra models. But bilinear filters have stability problem because they involve nonlinear feedback. Adaptive algorithms for bilinear filters may be diverge and have poor convergence characteristics when input signal is large In this paper, necessary and sufficient condition for mean square stability of bilinear filters for given input signal statistics is briefly described, and the method obtaining the input bound to guarantee the stability of bilinear filters is presented. New RPEM algorithm, which does not diverge and has the superior convergence characteristics compared with the conventional RPEM algorithm when input signal is large, is derived by applying the time-varying Kalman filtering concept to the conventional RPEM algorithm.

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A급 CMOS 전류 콘베이어 (CCII) (Class A CMOS current conveyors)

  • 차형우
    • 전자공학회논문지C
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    • 제34C권9호
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    • pp.1-9
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    • 1997
  • Novel class A CMOS second-generation current conveyors (CCII) using 0.6.mu.m n-well standard CMOS process for high-frequency current-mode signal processing were developed. The CCII consists of a regulated current-cell for the voltage input and a cascode current mirror for the current output. In this architecture, the two input stages are coupled by current mirrors to reduce the current input impedance. Measurements of the fabricated cCII show that the current input impedance is 308 .ohm. and the 3-dB cutoff frequency when used as a voltage amplifier extends beyond 10MHz. The linear dynamic ranges of voltage and current are from -0.5V to 1.5V and from -100.mu.A to +120.mu.A for supply voltage V$\_$DD/ = -V$\_$SS/=2.5V, respectively. The power dissipation is 2 mW and the active chip area is 0.2 * 0.2 [mm$\^$2/].

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Multi-level & Multi-bandwidth 시스템에서 위성중계기 입력반송파 전력의 최적 할당 기법 (A Method for Optimal Power Assignment of the Transponder Input Carriers in the Multi-level & Multi-bandwidth System)

  • 김병균;최형진
    • 전자공학회논문지A
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    • 제32A권9호
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    • pp.1167-1176
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    • 1995
  • This paper suggests a method for optimal power assignment of the satellite transponder input carriers in the Multi-level & Multi-bandwidth system. The interference and the noise effects analyzed for the optimal power assignment are intermodulation product caused by the nonlinear transponder characteristics, adjacent channel interference, co-channel interference, and thermal noise in the satellite link. The Fletcher- Powell algorithm is used to determine the optimal input carrier power. The performance criteria for optimal power assignment is classified into 4 categories according to the CNR of destination receiver earth station to meet the requirement for various satellite link environment. We have performed mathematical analysis of objective functions and their derivatives for use in the Fletcher-Powell algorithm, and presented various simulation results based on mathematical analysis. Since the satellite link, it is meaningful to model and analyze these effects in a unified manner and present the method for optimal power assignment of transponder input carriers.

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동적으로 출력 뉴런을 생성하는 경쟁 학습 신경회로망 (Competitive Learning Neural Network with Dynamic Output Neuron Generation)

  • 김종완;안제성;김종상;이흥호;조성원
    • 전자공학회논문지B
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    • 제31B권9호
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    • pp.133-141
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    • 1994
  • Conventional competitive learning algorithms compute the Euclidien distance to determine the winner neuron out of all predetermined output neurons. In such cases, there is a drawback that the performence of the learning algorithm depends on the initial reference(=weight) vectors. In this paper, we propose a new competitive learning algorithm that dynamically generates output neurons. The proposed method generates output neurons by dynamically changing the class thresholds for all output neurons. We compute the similarity between the input vector and the reference vector of each output neuron generated. If the two are similar, the reference vector is adjusted to make it still more like the input vector. Otherwise, the input vector is designated as the reference vector of a new outputneuron. Since the reference vectors of output neurons are dynamically assigned according to input pattern distribution, the proposed method gets around the phenomenon that learning is early determined due to redundant output neurons. Experiments using speech data have shown the proposed method to be superior to existint methods.

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무손실 스너버 회로를 이용한 소프트 스위칭 강압형 고역률 컨버터 (Soft switching high power factor buck converter using loss less snubber circuit)

  • 구헌회;변영복;김성철;서기영;이현우
    • 전자공학회논문지S
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    • 제34S권6호
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    • pp.77-84
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    • 1997
  • buck type converter doesn't appear when an input voltag eis lower than an output voltage. This is the main reason the buck converter has not been used for high power factor converters. In this paper, soft switching high power factor buck converter is proposed. This converter is composed of diode rectifier, input capacitor can be small enough to filter input current, buck converter with loss less snubber circuit. Converter is operated in discontinous conduction mode, turn on of the switching device is a zero current switching (ZCS) and high powr factor input is obtianed. In addition, zero voltage switching (ZVS) at trun off is achieved and switching loss is reduced using loss less snubber circuit. The capacitor used in the snubber circuit raised output voltage. Therefore, proposed converter has higher output voltage and higher efficiency than conventional buck type converter at same duty factor in discontinous conduction mode operation. High power factro, efficiency, soft switching operation of proposed converter is veified by simulation using Pspice and experimental results.

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입력큐 교환기를 위한 스케줄링기법 (An Efficient Scheduling for Input Queued Switch)

  • 이상호;신동열
    • 대한전자공학회논문지TC
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    • 제38권12호
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    • pp.58-66
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    • 2001
  • 입력큐방식의 교환기는 간결하며 고속교환을 위한 효과적인 교환방법이나 입력 측의 큐에서 발생하는 HOL-블로킹(HOL-Blocking)은 패킷들의 대기시간을 크게 증가시켜 전체 시스템의 효율을 58%로 제한한다. 이를 해결하는 방법은 별도의 스케줄러(scheduler, contention controller)를 두어 블로킹의 방지 및 높은 처리율을 얻고 있다. 대부분의 스케줄러의 구현은 중앙집중방식으로 구현되는데 이는 다양한 교환기의 구성을 어렵게 한다. 본 논문에서는 입력포트별로 간단하면서 분산된 형태의 스케줄러를 소개하고 모의실험을 통하여 성능을 검증한다.

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A Neuro-Fuzzy Inference System for Sensor Failure Detection Using Wavelet Denoising, PCA and SPRT

  • Na, Man-Gyun
    • Nuclear Engineering and Technology
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    • 제33권5호
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    • pp.483-497
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    • 2001
  • In this work, a neuro-fuzzy inference system combined with the wavelet denoising, PCA (principal component analysis) and SPRT (sequential probability ratio test) methods is developed to detect the relevant sensor failure using other sensor signals. The wavelet denoising technique is applied to remove noise components in input signals into the neuro-fuzzy system The PCA is used to reduce the dimension of an input space without losing a significant amount of information. The PCA makes easy the selection of the input signals into the neuro-fuzzy system. Also, a lower dimensional input space usually reduces the time necessary to train a neuro-fuzzy system. The parameters of the neuro-fuzzy inference system which estimates the relevant sensor signal are optimized by a genetic algorithm and a least-squares algorithm. The residuals between the estimated signals and the measured signals are used to detect whether the sensors are failed or not. The SPRT is used in this failure detection algorithm. The proposed sensor-monitoring algorithm was verified through applications to the pressurizer water level and the hot-leg flowrate sensors in pressurized water reactors.

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PDA에서의 명함 영상의 기울기 보정 (Skew Correction of Business Card Images for PDA Application)

  • 박준효;장익훈;김남철
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2003년도 하계종합학술대회 논문집 Ⅳ
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    • pp.2128-2131
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    • 2003
  • We present an efficient algorithm for skew correction of business card images obtained by a PDA camera. The proposed method is composed of four parts: block adaptive binarization (BAB), stripe generation, skew angle calculation, and image rotation. In the BAB, an input image is binarized block by block so as to lessen the effects of irregular illumination and shadows over the input image. In the stripe generation, character string clusters are generated merging character strings and their inter-spaces, and then only clusters useful for skew angle calculation are output as stripes. In the skew angle calculation, the direction angles of the stripes are calculated using their central moments and then the skew angle of the input image is determined averaging the direction angles. In the image rotation, the input image is rotated by the skew angle. Experimental results shows that the proposed method yields correction rates of 97% for business card images.

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원통 모델과 스테레오 카메라를 이용한 포즈 변화에 강인한 얼굴인식 (Pose-invariant Face Recognition using Cylindrical Model and Stereo Camera)

  • 노진우;안병두;;고한석
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2003년도 하계종합학술대회 논문집 Ⅳ
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    • pp.2012-2015
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    • 2003
  • This paper proposes a pose-invariant face recognition method using cylindrical model and stereo camera. We divided this paper into two parts. One is single input image case, the other is stereo input image case. In single input image case, we normalized a face's yaw pose using cylindrical model, and in stereo input image case, we normalized a face's pitch pose using cylindrical model with estimated object's pitch pose by stereo geometry. Also, since we have advantage that we can utilize two images acquired at the same time, we can increase overall recognition rate by decision-level fusion. By experiment, we confirmed that recognition rate could be increased using our methods.

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Hot carrier 현상에 의한 CMOS 차동 증폭기의 성능 저하 (The performance degradation of CMOS differential amplifiers due to hot carrier effects)

  • 박현진;유종근;정운달;박종태
    • 전자공학회논문지D
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    • 제34D권7호
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    • pp.23-29
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    • 1997
  • The performance degradation of CMOS differential amplifiers due to hot carrier effect has been measured and analyzed. Two-state CMOS amplifiers whose input transistors are PMOSFETs were designed and fabriacted using the ISRC CMOS 1.5.mu.m process. It was observed after the amplifier was hot-carrier stressed that the small-signal voltage gain and the input offset voltage increased and the phase margin decreased. The performance variation results from the increase of the transconductances and gate capacitances of the PMOSFETs used as input transistors in the differential input stage and the output stage and also resulted from the decrease of their output conductances. After long-term stress, the amplifier became unstable. The reason might be that its phase margin was reduced due to hot carrier effect.

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