• Title/Summary/Keyword: Input buffer

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A 32-Gb/s Inductorless Output Buffer Circuit with Adjustable Pre-emphasis in 65-nm CMOS

  • Tanaka, Tomoki;Kishine, Keiji;Tsuchiya, Akira;Inaba, Hiromi;Omoto, Daichi
    • IEIE Transactions on Smart Processing and Computing
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    • v.5 no.3
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    • pp.207-214
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    • 2016
  • Optical communication systems are rapidly spread following increases in data traffic. In this work, a 32-Gb/s inductorless output buffer circuit with adjustable pre-emphasis is proposed. The proposed circuit consists of an output buffer circuit and an emphasis circuit. The emphasis circuit emphasizes the high frequency components and adds the characteristics of the output buffer circuit. We proposed a design method using a small-signal equivalent-circuit model and designed the compensation characteristics with a 65-nm CMOS process in detail using HSPICE simulation. We also realized adjustable emphasis characteristics by controlling the voltage. To confirm the advantages of the proposed circuit and the design method, we fabricated an output buffer IC with adjustable pre-emphasis. We measured the jitter and eye height with a 32-Gb/s input using the IC. Measurement results of double-emphasis showed that the jitter was 14% lower, and the eye height was 59% larger than single-emphasis, indicating that our proposed configuration can be applied to the design of an output buffer circuit for higher operation speed.

Analyzing the Impact of Buffer Capacity on Crosspoint-Queued Switch Performance

  • Chen, Guo;Zhao, Youjian;Pei, Dan;Sun, Yongqian
    • Journal of Communications and Networks
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    • v.18 no.3
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    • pp.523-530
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    • 2016
  • We use both theoretical analysis and simulations to study the impact of crosspoint-queued (CQ) buffer size on CQ switch throughput and delay performance under different traffic models, input loads, and scheduling algorithms. In this paper, we present the following. 1) We prove the stability of CQ switch using any work-conserving scheduling algorithm. 2) We present an exact closed-form formula for the CQ switch throughput and a non-closed-form but convergent formula for its delay using static non-work-conserving random scheduling algorithms with any given buffer size under independent Bernoulli traffic. 3) We show that the above results can serve as a conservative guide on deciding the required buffer size in pure CQ switches using work-conserving algorithms such as the random scheduling, under independent Bernoulli traffic. 4) Furthermore, our simulation results under real-trace traffic show that simple round-robin and random work-conserving algorithms can achieve quite good throughput and delay performance with a feasible crosspoint buffer size. Our work reveals the impact of buffer size on the CQ switch performance and provides a theoretical guide on designing the buffer size in pure CQ switch, which is an important step toward building ultra-high-speed switch fabrics.

다수의 동일한 입력원을 갖는 ATM Multiplexer의 정확한 셀 손실 확률 분석

  • Choi, Woo-Yong;Jun, Chi-Hyuck
    • Proceedings of the Korean Operations and Management Science Society Conference
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    • 1995.04a
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    • pp.435-444
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    • 1995
  • We propose a new approach to the calculation of the exact cells loss probability in a shared buffer ATM multiplexer, which is loaded with homogeneous discrete-time ON-OFF sources. Renewal cycles are identified in regard to the state of input sources and the buffer state on each renewal circle is modelled as a K(shared buffer size)-state Markov chain. We also analyze the behavior of queue build-up at the shared buffer whose distribution together with the steady-state probabilities of the Markov chain leads to the exact cell loss probability. Our approach to obtaining the exact cell loss probability seems to be more efficient than most of other existing ones since our underlying Markov chain has less number of states.

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POWER TAIL ASYMPTOTIC RESULTS OF A DISCRETE TIME QUEUE WITH LONG RANGE DEPENDENT INPUT

  • Hwang, Gang-Uk;Sohraby, Khosrow
    • Journal of the Korean Mathematical Society
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    • v.40 no.1
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    • pp.87-107
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    • 2003
  • In this paper, we consider a discrete time queueing system fed by a superposition of an ON and OFF source with heavy tail ON periods and geometric OFF periods and a D-BMAP (Discrete Batch Markovian Arrival Process). We study the tail behavior of the queue length distribution and both infinite and finite buffer systems are considered. In the infinite buffer case, we show that the asymptotic tail behavior of the queue length of the system is equivalent to that of the same queueing system with the D-BMAP being replaced by a batch renewal process. In the finite buffer case (of buffer size K), we derive upper and lower bounds of the asymptotic behavior of the loss probability as $K\;\longrightarrow\;\infty$.

The Random Number Generator for the P.D.F of the Blocks ind the Buffer (버퍼내전송블럭의 확률밀도함수 추적을 위한 Random Number의 발생기에 관한 연구)

  • Park, Yhl
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.7 no.3
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    • pp.130-134
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    • 1982
  • In computer communication network, it is assumed that blocks are served at a rate of u messages per sec. The message blocks will be stayed in the buffer during the service time. In this case, the probability density distribution of the number of message blocks in the buffer space has been studied. When the average buffer space needed is minimum, the average block size will be specified by the relation between the input data and link infromation length. This relation proves to be perfect. The random number generator for this probability distribution is designed. The test result by making use of the random number generator has shown that is has little difference from the theoretical one.

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All-Optical WDM Buffer System realized by NOLM and Feedback Loop (NOLM과 피드백 루프에 의해 구현된전광 WDM 버퍼 시스템)

  • 이승우;윤경모;이용기;엄진섭
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.29 no.5A
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    • pp.514-520
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    • 2004
  • In WDM networt a WDM buffer is one of essential elements for realizing all-optical packet switching system. In this paper, we propose and demonstrate a single loop type all-optical WDM buffer system. The proposed one consists of NOLM and feedback loop, and provides more than 40 turns buffering (more than 20${\mu}\textrm{s}$) for single input pulse (1550nm, width: 20㎱) before selected by control signal pulse (1553nm, width: 30㎱).

Optimal buffer partition for provisioning QoS of wireless network

  • Phuong Nguyen Cao;Dung Le Xuan;Quan Tran Hong
    • Proceedings of the IEEK Conference
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    • summer
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    • pp.57-60
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    • 2004
  • Next generation wireless network is evolving toward IP-based network that can various provide multimedia services. A challenge in wireless mobile Internet is support of quality of service over wireless access networks. DiffServ architecture is proposed for evolving wireless mobile Internet. In this paper we propose an algorithm for optimal buffer partitioning which requires the minimal channel capacity to satisfy the QoS requirements of input traffic. We used a partitioned buffer with size B to serve a layered traffic at each DiffServ router. We consider a traffic model with a single source generates traffic having J $(J\geq2)$ quality of service (QoS) classes. QoS in this case is described by loss probability $\varepsilon_j$. for QoS class j. Traffic is admitted or rejected based on the buffer occupancy and its service class. Traffic is generated by heterogeneous Markov-modulated fluid source (MMFS).

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A Study on Butter Managment Mechanism for Efficient Cell Transmission in ATM Network (ATM망에서 효율적인 셀 전송을 위한 버퍼 관리 기법에 관한 연구)

  • 양신현;서진교;김준년;김영일
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.22 no.4
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    • pp.782-792
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    • 1997
  • Asynchronous transfer mode (ATM) provides the means to support with variety of multimedia serivices in broadband network. For the support of multimedia services, various data traffic with priortes should be controlled errectively and congestion function is required in the network to carry out the control operation. To accomplish this in a flexible and effective manner, priorty classes for the different services are commonly used. In this paper, we suggested a buffer managment algorithm in ATM network to improve overall network performance with separated buffer which consists of existing buffer with threshold andauxiliary buffer whose input consists of superposition of voice and data traffic. To evaluate the proposed buffer managment algorithms, simulations are excuted with two proiorities and the results are provied that network throughput is improved better than the existing parital buffer method.

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Language performance analysis based on multi-dimensional verbal short-term memories in patients with conduction aphasia (다차원 구어 단기기억에 따른 전도 실어증 환자의 언어수행력 분석)

  • Ha, Ji-Wan;Hwang, Yu Mi;Pyun, Sung-Bom
    • Korean Journal of Cognitive Science
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    • v.23 no.4
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    • pp.425-455
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    • 2012
  • Multi-dimensional verbal short-term memory mechanisms are largely divided into the phonological channel and the lexical-semantic channel. The former is called phonological short-term memory and the latter is called semantic short-term memory. Phonological short-term memory is further segmented into the phonological input buffer and the phonological output buffer. In this study, the language performance of each of three patients with similar levels of conduction aphasia was analyzed in terms of multi-dimensional verbal short-term memory. To this end, three patients with conduction aphasia were instructed to perform four different aspects of language tasks that are spontaneous speaking, repetition, spontaneous writing, and dictation in both word and sentence level. Moreover, the patients' phonological memories and semantic short-term memories were evaluated using digit span tests and verbal learning tests. As a result, the three subjects exhibited various types of performances and error responses in the four aspects of language tests, and the short-term memory tests also did not produce identical results. The language performance of three patients with conduction aphasia can be explained according to whether the defects occurred in the semantic short-term memory, phonological input buffer and/or phonological output buffer. In this study, the relations between language and multi-dimensional verbal short-term memory were discussed based on the results of language tests and short-term memory tests in patients with conduction aphasia.

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An Improved DBP Window Policy in the Input Buffer Switch Using Non-FIFO Memory Structure (Non-FIFO 메모리 구조를 사용한 입력버퍼형 스위치에서 개선된 DBP 윈도우 기법)

  • Kim, Hoon;Park, Sung-Hun;Park, Kwang-Chae
    • Proceedings of the Acoustical Society of Korea Conference
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    • 1998.06e
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    • pp.223-226
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    • 1998
  • In the Input Buffer Switch using the intial stage FIFO memory structure, It has pointed the Throughput limitation to the percent of 58.6 due to HOL(Head of Line) blocking in the DBP(Dedicated Buffer with Pointer) method, During that time, To overcome these problems, The prior papers have proposed the complicated Arbitration algorithms and Non-FIFO memory structures. and These showed the improved Throughput. But, Now, To design high speed ATM Switch which need to the tens of Giga bit/s or the tens of Tera bit/s. It has more difficulty in proceeding the priority of majority and the complicated Cell Scheduling, because of the problem in operating the control speed of the ratio of N to scanning each port and scheduling the Cell. In this paper, To overcome these problems, We could show more the improved performance than the existing DBP Window policy to design high speed ATM Switch.

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