• The Journal of Korean Institute of Communications and Information Sciences
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• v.39A no.10
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• pp.579-584
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• 2014

In this paper, we propose beamsapce MIMO(mulitple input multiple output) system using patch ESPAR(Electronically Steerable Parasitic Array Radiator) antenna. When using conventional monopole ESPAR antenna, we have advantages cost of hardware and power consumption of RF cirsuit because of single RF chian. But it is difficult to apply to small portable mobile device. Therefore we design patch ESPAR antenna in order to reducing volume and analyze performance of BS MIMO system that is able to MIMO communication with single RF chain. In This paper, we confirm beam pattern of designed patch ESPAR antenna is steered as ${\pm}15^{\circ}$ elevation angle. Furthermore, we design BS MIMO system using this ESPAR antenna and confirm BER performance of this system.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.5
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• pp.999-1008
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• 2012

Unlike the existing CMOS chip, ISB (Intelligent Silicon Bead) is new concept biochip equipped with optical communication and memory function. It uses the light for power of SoC CMOS and interface with external devices therefore it is possible to miniaturize a chip size and lower the cost. This paper introduces an input protocol and a design of the low power and the low area to transfer the power and the signal through a single optical signal applied from external reader device to bead chip at the same time. It is also verified through simulation and measurement. In addition, low-power PROM is designed for recording and storing ID of a chip and it is successful in obtaining the value of output according to the optical input. Through this study, a new type biochip development can be expected by solving high cost and a limit of miniaturizing a chip area problem of an existing RFID.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.11 no.10
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• pp.5168-5181
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• 2017

The popularity of augmented reality (AR) applications and games are in high demand. Currently, the best common platform to implement AR services is on a smartphone, as online games, navigators, personal assistants, travel guides are among the most popular applications of smartphones. However, the power consumption of an AR application is extremely high, and therefore, highly adaptable and dynamic low power control schemes must be used. Dynamic voltage and frequency scaling (DVFS) schemes are widely used in smartphones to minimize the energy consumption by controlling the device's operational frequency and voltage. DVFS schemes can sometimes lead to longer response times, which can result in a significant problem for AR applications. In this paper, an AR response time monitor is used to observe the time interval between the AR image input and device's reaction time, in order to enable improved operational frequency and AR application process priority control. Based on the proposed response time monitor and the characteristics of the Linux kernel's completely fair scheduler (CFS) (which is the default scheduler of Android based smartphones), a response time step control (RSC) scheme is proposed which adaptively adjusts the CPU frequency and interactive application's priority. The experimental results show that RSC can reduce the energy consumption up to 10.41% compared to the ondemand governor while reliably satisfying the response time performance limit of interactive applications on a smartphone.

• Journal of the Korea Society of Computer and Information
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• v.19 no.7
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• pp.113-130
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• 2014

In this paper, we propose BLOCS algorithm to find sequence of data that should be saved in cache device of hybrid storage system which uses SSD as a cache device. BLOCS algorithm which uses a sequence pattern mining scheme, creates a set of frequently requested sectors with respect to requested order of sectors. To compare the performance of the proposed scheme, we introduce Distance (DIST) based scheme, Request Frequency (FREQ) based scheme, and Frequency times Size (F-S) based scheme. We measure the hit ratio and I/O latency of different caching schemes using hybrid storage caching simulator. We acquired booting workload along with ten scenarios of launching applications and use the workloads as input to the cache simulator. After experiment with booting workload, we find that BLOCS scheme gives hit ratio of 61% which is about 15% higher than the least performing DIST scheme.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.10
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• pp.2329-2334
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• 2012

In this paper, we performed a study of damage assessment model development to analyze the initial nuclear pulse radiation damage to semiconductor devices for military weapon systems. At first we modeled(M) the nuclear pulse radiation and diode device, and simulated(S) the output characteristics of the device to the input. Then the manufactured diodes which had the same characteristics with the modeled one were irradiated to the similar pulsed type radiation and their output signals were measured simultaneously. Error between the M & S results and the measured values of the analysis was 22.9%. Through the error value we could confirm that the damage assessment model simulated the TREE effects with a quite accuracy.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.10
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• pp.40-47
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• 2016

In this paper, a dual mode buck converter with an ability to change mode is proposed, which is suitable particularly for portable device. The problem of conventional mode control circuit is affected by load variation condition such as suddenly or slowly. To resolve this problem, the mode control was designed with slow clock method. Also, when change from the PFM(Pulse Frequency Modulation) mode to the PWM(Pulse Width Modulation) mode, to use the counter to detect a high load. And the user can select mode transition point in load range from 20mA to 90mA by 3 bit digital signal. The circuits are implemented by using BCDMOS 0.18um 2-polt 3-metal process. Measurement environment are input voltage 3.7V, output voltage 1.2V and load current range from 10uA to 500mA. And measurement result show that the peak efficiency is 86% and ripple voltage is less 32mV.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.18 no.9
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• pp.1332-1347
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• 1993

Existing instruments are composed independently according to their function and user constructed instrumentation system with those instruments. But in the late 1980s VXI bus enables to construct instrumentation system with various modular type instruments. For an VXI bus system with the word serial protocol, an increase of data size can degrade the system performance. In this paper shared memory protocol is proposed to overcome performance degradation. The shared memory protocol is analyzed using the GSPN and compared with that of the word serial protocol. It is shown that the shared memory protocol has a better performance than the word serial protocol. The VXI bus message based-system with the proposed shared memory protocol is constructed and experimented with signal generating device and FFT analyzing device. Up to 80 KHz input signal the result of FFT analysis is accurate and that result is agree with that of conventional FFT analyzer. In signal generating experiment from 100 KHz to 1.1 GHz sine wave is generated.

• Transactions of the Society of Information Storage Systems
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• v.1 no.2
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• pp.155-160
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• 2005

In this paper, the channel decoder promising reliable data retrieving in noisy holographic channel has been developed for holographic WORM(write once read many) system. It covers various DSP(digital signal processing) blocks, such as align mark detector, adaptive channel equalizer, modulation decoder and ECC(error correction code) decoder. The specific schemes of DSP are designed to reduce the effect of noises in holographic WORM(H-WORM) system, particularly in prototype of DAEWOO electronics(DEPROTO). For real time data retrieving, the channel decoder is redesigned for FPGA(field programmable gate array) based hardware, where DSP blocks calculate in parallel sense with memory buffers between blocks and controllers for driving peripherals of FPGA. As an input source of the experiments, MPEG2 TS(transport stream) data was used and recorded to DEPROTO system. During retrieving, the CCD(charge coupled device), capturing device of DEPROTO, detects retrieved images and transmits signals of them to the FPGA of hardware channel decoder. Finally, the output data stream of the channel decoder was transferred to the MPEG decoding board for monitoring video signals. The experimental results showed the error corrected BER(bit error rate) of less than $10^{-9}$, from the raw BER of DEPROTO, about $10^{-3}$. With the developed hardware channel decoder, the real-time video demonstration was possible during the experiments. The operating clock of the FPGA was 60 MHz, of which speed was capable of decoding up to 120 mega channel bits per sec.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.35 no.11B
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• pp.1667-1675
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• 2010

This paper presents a high efficiency DC-DC buck converter for mobile device. The circuit employes simplified compensation circuit for its portability and for high efficiency at stand-by mode. This device operates at PFM mode when it enters stand-by mode(light load). In order to place the compensation circuit on chip, the capacitor multiplier method is employed, such that it can minimize the compensation block size of the error amplifier down to 30%. The measurement results show that the buck converter provides a peak efficiency of 93% on PWM mode, and 92.3% on PFM mode. The converter has been fabricated with a $0.35{\mu}m$ CMOS technology. The input voltage of the buck converter ranges from 2.5V to 3.3V and it generates the output of 3.3V.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.27 no.12
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• pp.1075-1083
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• 2016

Nowadays, the use of wireless input devices has been increasing on the basis of high convenience and portability. In particular the most widely used wireless keyboard and the mouse to use the 2.4 GHz frequency band, but due to the third party receives the electromagnetic wave from leaking when the radio equipment it is easy to obtain the personal information and the vulnerability is also being reported consistently. In this paper, implement a system to analyze and manipulate the packets of 2.4 GHz wireless keyboard and mouse using USRP device and GNU Radio package for verify the vulnerability of 2.4 GHz wireless keyboard and mouse. Using the construction system has attained a equipment specific address and key information by analyzing the communication protocol and the packet structure of the device was proved that a user can operate the PC to send the random key from long distance.