• Title/Summary/Keyword: Information input device

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Design of a Voltage Protection Circuit for DC-DC Converter of the Potable Device Application (소형 휴대기기용 DC-DC 변환기를 위한 전압 보호회로 설계)

  • Park, Ho-Jong;Heo, Yun-Seok;Park, Yong-Su;Kim, Nam-Tae;Song, Han-Jung
    • 전자공학회논문지 IE
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    • v.49 no.1
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    • pp.18-23
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    • 2012
  • In this paper, a potable device application for DC-DC converter was designed for voltage protection circuit. Voltage protection circuit to offer the under voltage lock out and over voltage protection consists of a comparator and bais circuits were implemented using. XFAB 1um CMOS process, SPICE simulations was confirmed through the characteristics. Simulation results, under voltage lock out input voltage is 4.8 V higher when the turn-on and, 4.2 V less when turn-off. When the input voltage is low voltage is applied can be used to prevent malfunction of the circuit. Over voltage protection is 3.8 V reference voltage when the output voltage caused by blocking circuit prevents device destruction can be used to improve the stability and reliability. The virtual control circuits of the DC-DC converter connected. According to the results of the abnormal voltage, voltage protection circuit behavior was confirmed. The proposed voltage protection circuit of the DC-DC converter cell is useful are considered.

A Comparison Study of Input ESD Protection schemes Utilizing Thyristor and Diode Devices (싸이리스터와 다이오드 소자를 이용하는 입력 ESD 보호방식의 비교 연구)

  • Choi, Jin-Young
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.47 no.4
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    • pp.75-87
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    • 2010
  • For two input-protection schemes suitable for RF ICs utilizing the thyristor and diode protection devices, which can be fabricated in standard CMOS processes, we attempt an in-depth comparison on HBM ESD robustness in terms of lattice heating inside protection devices and peak voltages developed across gate oxides in input buffers, based on DC, mixed-mode transient, and AC analyses utilizing a 2-dimensional device simulator. For this purpose, we construct an equivalent circuit for an input HBM test environment of a CMOS chip equipped with the input ESD protection circuits, which allows mixed-mode transient simulations for various HBM test modes. By executing mixed-mode simulations including up to six active protection devices in a circuit, we attempt a detailed analysis on the problems, which can occur in real tests. In the procedure, we suggest to a recipe to ease the bipolar trigger in the protection devices and figure out that oxide failure in internal circuits is determined by the junction breakdown voltage of the NMOS structure residing in the protection devices. We explain the characteristic differences of two protection schemes as an input ESD protection circuit for RF ICs, and suggest valuable guidelines relating design of the protection devices and circuits.

Design of Small Space Convergence Locking device Using IoT (IOT를 이용한 소규모 공간의 융합 잠금 장치 제안)

  • Park, Hyun-Joo
    • Journal of the Korea Convergence Society
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    • v.12 no.2
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    • pp.45-50
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    • 2021
  • In this paper, we propose the development of a smart space security device that can be opened and closed remotely using IoT. Existing space security devices can control opening and closing by breaking hardware or only using button devices or replicated keys. The recent COVID-19 crisis has created several applications for non-contact devices. In this study, we propose the development of a small space security device that has the function of unlocking through an app without touching the device. By transferring the control authority to a smartphone, device that cannot be opened or closed by only operating hardware at the user's option. It is convenient and hygienic because it can be opened and closed using an app without touching the locking device. Multiple security is possible because security can be released using an app after user authentication by fingerprint recognition and pattern input on a smartphone. If the user wishes, after using the app security, the security is released by directly touching a button installed in the safe or space or opening it with a key. In addition, by adding an inactive function to the app, it is designed so that the door of the safe cannot be opened when the key is lost or the small safe is lost. This study is expected to be able to effectively expand the security system by applying variously to objects that require security.

Development of a Signal Acquisition Device to Verify the Applicability of Millimeter Wave Tracking Radar Transmission and Receiving Components (밀리미터파 추적레이더 송·수신 구성품의 적용성 검증을 위한 신호획득장치 개발)

  • Jinkyu Choi;Youngcheol Shin;Soonil Hong;Han-Chun Ryu;Hongrak Kim;Jihan Joo
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.23 no.6
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    • pp.185-190
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    • 2023
  • Recently, tracking radar requires the development of millimeter wave tracking radar to acquire target information with high resolution in various environments. The development of millimeter wave tracking radar requires the development of transmission and receiving components that can be applied to the millimeter wave tracking radar, as well as verification of the applicability of the tracking radar. In order to verify the applicability of the developed transmitting and receiving components, it is necessary to develop a signal acquisition device that can control the transmitting and receiving components using the operating concept of a tracking radar and check the status of the received signal. In this paper, we implemented a signal acquisition device that can confirm the applicability of components developed for millimeter wave tracking radar. The signal acquisition device was designed to process in real time the OOOMHz center frequency and OOMHz bandwidth signals input from 4 channels to verify the received signal. In addition, component control applying the tracking radar operation concept was designed to be controlled by communication such as RS422, RS232, and SPI and generation of control signals for the transmission and receiving time. Lastly, the implemented signal acquisition device was verified through a signal acquisition device performance test.

Implementation of Gray-to-Gray 3D Crosstalk Reduction using Look-Up Table and Sub-Field Mapping (룩업 테이블 및 서브필드 맵핑을 이용한 계조 레벨 간 3D 크로스토크 저감 기술 구현)

  • Hong, Jae-Geun;Chung, Hae
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.38C no.10
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    • pp.928-936
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    • 2013
  • 3D crosstalk is one of the disturbing things to recognize 3D images. This is caused by the phenomenon that input image for left eye is transferred at the right eye and right eye is transferred at the left eye because of the imperfect isolation by the device characteristics. In this paper, we review the 3D PDP (Plasma Display Panel) operation using active shutter glasses and crosstalk measurement method and investigate the major cause of 3D crosstalk and extend conventional 3D crosstalk using full white and full black image input to Gray-to-Gray (GtoG) 3D crosstalk. We suggest a specific method to reduce Gray-to-Gray 3D crosstalk by using Look up Table (LUT) and sub-field mapping in PDP. And then, we verify the method by measuring GtoG 3D crosstalk rate through specific test images and numerical results.

Designing Effective Virtual Training: A Case Study in Maritime Safety

  • Jung, Jinki;Kim, Hongtae
    • Journal of the Ergonomics Society of Korea
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    • v.36 no.5
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    • pp.385-394
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    • 2017
  • Objective: The aim of this study is to investigate how to design effective virtual reality-based training (i.e., virtual training) in maritime safety and to present methods for enhancing interface fidelity by employing immersive interaction and 3D user interface (UI) design. Background: Emerging virtual reality technologies and hardware enable to provide immersive experiences to individuals. There is also a theory that the improvement of fidelity can improve the training efficiency. Such a sense of immersion can be utilized as an element for realizing effective training in the virtual space. Method: As an immersive interaction, we implemented gesture-based interaction using leap motion and Myo armband type sensors. Hand gestures captured from both sensors are used to interact with the virtual appliance in the scenario. The proposed 3D UI design is employed to visualize appropriate information for tasks in training. Results: A usability study to evaluate the effectiveness of the proposed method has been carried out. As a result, the usability test of satisfaction, intuitiveness of UI, ease of procedure learning, and equipment understanding showed that virtual training-based exercise was superior to existing training. These improvements were also independent of the type of input devices for virtual training. Conclusion: We have shown through experiments that the proposed interaction design results are more efficient interactions than the existing training method. The improvement of interface fidelity through intuitive and immediate feedback on the input device and the training information improve user satisfaction with the system, as well as training efficiency. Application: Design methods for an effective virtual training system can be applied to other areas by which trainees are required to do sophisticated job with their hands.

Development of a System for Recognizing Stamp Images (도장영상 인식 시스템의 개발)

  • 송민정;한경숙
    • Journal of Intelligence and Information Systems
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    • v.9 no.1
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    • pp.125-137
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    • 2003
  • In eastern countries stamps have been used more commonly than signatures when approving contracts and documents. Unlike finger prints, stamp images do not share similar patterns to each other and the resolution of stamp images is determined by the input status such as pressure under which stamps are put. This paper discusses the development of a system for recognizing stamp images of Korean or Chinese characters. Recognition of stamp images consists of several steps: acquisition of stamp images from an input device, digitization, contrast stretching, noise removal, and matching. We tested the system on 50 stamp images (20 stamp images of Korean characters, 20 images of Chinese characters, and 10 similar images). There was little difference in discrimination rate between the stamp images of Korean character and those of Chinese characters. 46 stamps images out of 50 were successfully recognized, resulting in 92% discrimination rate. Orientation and pressure under which stamps are put played an important role in determining discrimination rate. Automated stamp image recognition can be made more practical and useful by extending the types of stamp images to ellipses and rectangles and by improving the discrimination rate.

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Design of a RF fixed phase control circuit using I&Q Demodulator (I&Q Demodulator를 이용한 RF 고정 위상 제어기 설계)

  • Park, Ung-Hee;Chang, Ik-Soo;Huh, Jun-Won;Gang, In-Ho
    • Journal of the Korean Institute of Telematics and Electronics D
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    • v.36D no.1
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    • pp.8-14
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    • 1999
  • The active devices used at microwave frequency have the different phase shift according to input power. Especially, The difference of the phase shift is large in the saturation region of the amplifier. In this paper, we disigned the phase control system for fixing the different phase shift at device. With the high frequency nonlinear amplifier, we fabricated such system that the phase shift to be fixed automatically using the varible phase shifter. The variable phase shifter fixed total phase variation of the circuit using the information that was obtained from the comparison of imputsignal phase with output signal phase. Even though the input signal is 2-tone or FM type, we could estimate and also fix the phase variation on DUT Dynamic range is about 10dB. It has been experimented at 1960MHz using Teflon (H=31mil, ${\varepsilon}r$=3.2)

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Wearable User Interface based on EOG and Marker Recognition (EOG와 마커인식을 이용한 착용형 사용자 인터페이스)

  • Kang, Sun-Kyoung;Jung, Sung-Tae;Lee, Sang-Seol
    • Journal of the Korea Society of Computer and Information
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    • v.11 no.6 s.44
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    • pp.133-141
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    • 2006
  • Recently many wearable computers have been developed. But they still have many user interface problems from both an input and output perspective. This paper presents a wearable user interface based on EOG(electrooculogram) sensing circuit and marker recognition. In the proposed user interface, the EOG sensor circuit which tracks the movement of eyes by sensing the potential difference across the eye is used as a pointing device. Objects to manipulate are represented human readable markers. And the marker recognition system detects and recognize markers from the camera input image. When a marker is recognized, the corresponding property window and method window are displayed to the head mounted display. Users manipulate the object by selecting a property or a method item from the window. By using the EOG sensor circuit and the marker recognition system, we can manipulate an object with only eye movement in the wearable computing environment.

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A 1.8 V 0.18-μm 1 GHz CMOS Fast-Lock Phase-Locked Loop using a Frequency-to-Digital Converter

  • Lee, Kwang-Hun;Jang, Young-Chan
    • Journal of information and communication convergence engineering
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    • v.10 no.2
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    • pp.187-193
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    • 2012
  • A 1 GHz CMOS fast-lock phase-locked loop (PLL) is proposed to support the quick wake-up time of mobile consumer electronic devices. The proposed fast-lock PLL consists of a conventional charge-pump PLL, a frequency-to-digital converter (FDC) to measure the frequency of the input reference clock, and a digital-to-analog converter (DAC) to generate the initial control voltage of a voltage-controlled oscillator (VCO). The initial control voltage of the VCO is driven toward a reference voltage that is determined by the frequency of the input reference clock in the initial mode. For the speedy measurement of the frequency of the reference clock, an FDC with a parallel architecture is proposed, and its architecture is similar to that of a flash analog-to-digital converter. In addition, the frequency-to-voltage converter used in the FDC is designed simply by utilizing current integrators. The circuits for the proposed fast-lock scheme are disabled in the normal operation mode except in the initial mode to reduce the power consumption. The proposed PLL was fabricated by using a 0.18-${\mu}m$ 1-poly 6-metal complementary metal-oxide semiconductor (CMOS) process with a 1.8 V supply. This PLL multiplies the frequency of the reference clock by 10 and generates the four-phase clock. The simulation results show a reduction of up to 40% in the worstcase PLL lock time over the device operating conditions. The root-mean-square (rms) jitter of the proposed PLL was measured as 2.94 ps at 1 GHz. The area and power consumption of the implemented PLL are $400{\times}450{\mu}m^2$ and 6 mW, respectively.