• 제목/요약/키워드: Information Processing Time

검색결과 8,180건 처리시간 0.041초

Real Time Relative Radiometric Calibration Processing of Short Wave Infra-Red Sensor for Hyper Spectral Imager

  • Yang, Jeong-Gyu;Park, Hee-Duk
    • 한국컴퓨터정보학회논문지
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    • 제21권11호
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    • pp.1-7
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    • 2016
  • In this paper, we proposed real-time relative radiometric calibration processing method for SWIR(Short Wavelength Infra-Red) sensor using 'Hyper-Spectral Imager'. Until now domestic research for Hyper-Spectral Imager has been performing with foreign sensor device. So we have been studying hyper spectral sensor device to meet domestic requirement, especially military purpose. To improve detection & identify capability in 'Hyper-Spectral Imager', it is necessary to expend sensing wavelength from visual and NIR(Near Infra-Red) to SWIR. We aimed to design real-time processor for SWIR sensor which can control the sensor ROIC(Read-Out IC) and process calibrate the image. To build Hyper-Spectral sensor device, we will review the SWIR sensor and its signal processing board. And we will analyze relative radiometric calibration processing method and result. We will explain several SWIR sensors, our target sensor and its control method, steps for acquisition of reference images and processing result.

N-Step Sliding Recursion Formula of Variance and Its Implementation

  • Yu, Lang;He, Gang;Mutahir, Ahmad Khwaja
    • Journal of Information Processing Systems
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    • 제16권4호
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    • pp.832-844
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    • 2020
  • The degree of dispersion of a random variable can be described by the variance, which reflects the distance of the random variable from its mean. However, the time complexity of the traditional variance calculation algorithm is O(n), which results from full calculation of all samples. When the number of samples increases or on the occasion of high speed signal processing, algorithms with O(n) time complexity will cost huge amount of time and that may results in performance degradation of the whole system. A novel multi-step recursive algorithm for variance calculation of the time-varying data series with O(1) time complexity (constant time) is proposed in this paper. Numerical simulation and experiments of the algorithm is presented and the results demonstrate that the proposed multi-step recursive algorithm can effectively decrease computing time and hence significantly improve the variance calculation efficiency for time-varying data, which demonstrates the potential value for time-consumption data analysis or high speed signal processing.

Time-Series Forecasting Based on Multi-Layer Attention Architecture

  • Na Wang;Xianglian Zhao
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • 제18권1호
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    • pp.1-14
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    • 2024
  • Time-series forecasting is extensively used in the actual world. Recent research has shown that Transformers with a self-attention mechanism at their core exhibit better performance when dealing with such problems. However, most of the existing Transformer models used for time series prediction use the traditional encoder-decoder architecture, which is complex and leads to low model processing efficiency, thus limiting the ability to mine deep time dependencies by increasing model depth. Secondly, the secondary computational complexity of the self-attention mechanism also increases computational overhead and reduces processing efficiency. To address these issues, the paper designs an efficient multi-layer attention-based time-series forecasting model. This model has the following characteristics: (i) It abandons the traditional encoder-decoder based Transformer architecture and constructs a time series prediction model based on multi-layer attention mechanism, improving the model's ability to mine deep time dependencies. (ii) A cross attention module based on cross attention mechanism was designed to enhance information exchange between historical and predictive sequences. (iii) Applying a recently proposed sparse attention mechanism to our model reduces computational overhead and improves processing efficiency. Experiments on multiple datasets have shown that our model can significantly increase the performance of current advanced Transformer methods in time series forecasting, including LogTrans, Reformer, and Informer.

실시간 처리 기반의 모바일 클라이언트-서버 시스템 구현 (Implementation of Mobile Cliented-Server System for Real-Time Processing)

  • 주해종;홍봉화
    • 정보학연구
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    • 제9권4호
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    • pp.35-47
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    • 2006
  • Many researches are going on with regard to issues and problems related to mobile database systems, which are caused by the weak connectivity of wireless networks, the mobility and the portability of mobile clients. Mobile computing satisfies user's demands for convenience and performance to use information at any time and in any place, but it has many problems to be solved in the aspect of data management. The purpose of our study is to Implement Real-Time Mobile Query Processing System(MQPS) to solve problems related to database hoarding, the maintenance of shared dataconsistency and the optimization of logging, which are caused by the weak connectivity and disconnection of wireless networks inherent in mobile database systems under mobile client server environments. In addition, we proved the superiority of the proposed MQPS by comparing its performance to the C I S(Client-Intercept-Srever) model.

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LBT-Random Searching 방식을 채용한 RFID 시스템의 트래픽 처리 시간 및 용량 해석 (Processing Time and Traffic Capacity Analysis for RFID System Using LBT-Random Searching Scheme)

  • 황인관;임연준;표철식
    • 한국통신학회논문지
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    • 제30권9A호
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    • pp.822-829
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    • 2005
  • 본 논문에서는 LBT-Random Searching 방식을 채용한 RFID 시스템의 트래픽 처리시간 및 주파수 채널 용량 분석을 위한 알고리즘을 제시하였다. 서비스 시간, 주파수 채널 탐색시간, 연속적인 주파수 채널 사용에 따른 지연시간, 연속적인 동일 주파수 채널 사용에 따른 지연시간을 고려하여 정상상태에서의 트래픽 처리 지연시간을 산출하였다. 시뮬레이션을 통하여 최대처리 가능한 트래픽 용량 및 주파수 채널수를 평가하고, 제안된 분석 알고리즘 정확성을 입증하였다.

LBT-Serial Searching 방식을 채용한 RFID 시스템의 트래픽 처리 시간 및 용량 해석 (Processing Time and Traffic Capacity Analysis for RFID System Using LBT-Serial Searching Scheme)

  • 황인관;조해근;표철식
    • 한국통신학회논문지
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    • 제30권10A호
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    • pp.930-937
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    • 2005
  • 본 논문에서는 LBT-Serial Searching 방식을 채용한 RFID(Radio Frequency Identification)시스템의 트래픽 처리 시간 및 주파수 채널 용량 분석을 위한 알고리즘을 제시하였다. 서비스 시간, 주파수 채널 탐색시간, 연속적인 주파수 채널 사용에 따른 지연시간, 연속적인 동일 주파수 채널 사용에 따른 지연시간을 고려하여 정상상태에서의 트래픽 처리 지연시간을 산출하였다. 모의실험을 통하여 최대처리 가능한 트래픽 용량 및 주파수 채널수를 평가하고, 제안된 분석 알고리즘 정확성을 입증하였다.

실시간 시스템 개발을 위한 데이터 처리 시간과 프로세서 사용율 추정 기법 (An Estimation Scheme on Processing Time and Processor Utilization for Real-Time System Development)

  • 김한동;최태봉;고순주
    • 한국정보과학회:학술대회논문집
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    • 한국정보과학회 2005년도 한국컴퓨터종합학술대회 논문집 Vol.32 No.1 (A)
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    • pp.820-822
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    • 2005
  • The current paper is on a study of the performance estimation fer data processing time and CPU utilization to efficiently develop the real-time system. The analytical modeling and OPNET modeling and benchmarking tests are applied to perform the estimation for data processing time and CPU utilization in real-time system. We demonstrate that the estimation results can be predicted fairly and accurately through the benchmarking test results although there is a small variance between the estimation results and the benchmarking test results.

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Intelligent Traffic Prediction by Multi-sensor Fusion using Multi-threaded Machine Learning

  • Aung, Swe Sw;Nagayama, Itaru;Tamaki, Shiro
    • IEIE Transactions on Smart Processing and Computing
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    • 제5권6호
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    • pp.430-439
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    • 2016
  • Estimation and analysis of traffic jams plays a vital role in an intelligent transportation system and advances safety in the transportation system as well as mobility and optimization of environmental impact. For these reasons, many researchers currently mainly focus on the brilliant machine learning-based prediction approaches for traffic prediction systems. This paper primarily addresses the analysis and comparison of prediction accuracy between two machine learning algorithms: Naïve Bayes and K-Nearest Neighbor (K-NN). Based on the fact that optimized estimation accuracy of these methods mainly depends on a large amount of recounted data and that they require much time to compute the same function heuristically for each action, we propose an approach that applies multi-threading to these heuristic methods. It is obvious that the greater the amount of historical data, the more processing time is necessary. For a real-time system, operational response time is vital, and the proposed system also focuses on the time complexity cost as well as computational complexity. It is experimentally confirmed that K-NN does much better than Naïve Bayes, not only in prediction accuracy but also in processing time. Multi-threading-based K-NN could compute four times faster than classical K-NN, whereas multi-threading-based Naïve Bayes could process only twice as fast as classical Bayes.

HDTV 후단 처리부에서의 시각적 가중 필터를 이용한 고속 De-interlacing 기법 연구 (A study on the method of the high-speed de-interlacing using the visual weighted filter in the post-processing of HDTV)

  • 정장훈;최연식
    • 전자공학회논문지S
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    • 제35S권1호
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    • pp.141-148
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    • 1998
  • We propose an efficient method of de-interlacing in the post-pocessing of HDTV signal. Since the proposed method considers human visual weight, it gives the better performance in the edge information preservation than that of the median filter. The processing time of the proposed method is twice faster than median filter, therefore the proposed method is suitable for the real-time de-interlacing in the post-processing of HDTV signal.

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효율적인 실시간 영상처리용 2-D 컨볼루션 필터 칩 (An Efficient 2-D Conveolver Chip for Real-Time Image Processing)

  • 은세영;선우명
    • 전자공학회논문지C
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    • 제34C권10호
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    • pp.1-7
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    • 1997
  • This paper proposes a new real-time 2-D convolver filter architecture wihtout using any multiplier. To meet the massive amount of computations for real-time image processing, several commercial 2-D convolver chips have many multipliers occupying large VLSI area. Te proposed architecture using only one shift-and-accumulator can reduce the chip size by more than 70% of commercial 2-D convolver filter chips and can meet the real-time image processing srequirement, i.e., the standard of CCIR601. In addition, the proposed chip can be used for not only 2-D image processing but also 1-D signal processing and has bood scalability for higher speed applications. We have simulated the architecture by using VHDL models and have performed logic synthesis. We used the samsung SOG cell library (KG60K) and verified completely function and timing simulations. The implemented filter chip consists of only 3,893 gates, operates at 125 MHz and can meet the real-time image processing requirement, that is, 720*480 pixels per frame and 30 frames per second (10.4 mpixels/second).

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