• Journal of Internet Computing and Services
• /
• v.14 no.5
• /
• pp.11-26
• /
• 2013

In the wireless Internet, it is so restrictive to use the IPSec. The MIPv4 IPSec's path cannot include wireless links. That is, the IPSec of the wireless Internet cannot protect an entire path of Host-to-Host connection. Also wireless circumstance keeps a path static during the shorter time, nevertheless, the IKE for IPSec SA agreement requires relatively long delay. The certificate management of IPSec PKI security needs too much burden. This means that IPSec of the wireless Internet is so disadvantageous. Our paper is to construct the Mobile IPSec proper to the wireless Internet which provides the host-to-host transport mode service to protect even wireless links as applying excellent WP-IBE scheme. For this, Mobile IPSec requires a dynamic routing over a path with wireless links. FA Forwarding is a routing method for FA to extend the path to a newly formed wireless link. The FA IPSec SA for FA Forwarding is updated to comply the dynamically extended path using Source Routing based Bind Update. To improve the performance of IPSec, we apply efficient and strong future Identity based Weil Pairing Bilinear Elliptic Curve Cryptography called as WP-IBE scheme. Our paper proposes the modified protocols to apply 6 security-related algorithms of WP-IBE into the Mobile IPSec. Particularly we focus on the protocols to be applied to construct ESP Datagram.

• Journal of the Korea Academia-Industrial cooperation Society
• /
• v.17 no.4
• /
• pp.43-51
• /
• 2016

Preventing the forgery and alteration of test reports is important, in order to maintain the reliability of military supplies. Based on a survey of reports on testing institutions and a case study of established electronic document systems in the public sector, we propose a system architecture, which helps prevent the forgery and alteration of test reports with legal force. The proposed architecture takes advantage of both the time stamp that records the time a document is received and a server synchronized with the testing institution. Using the proposed system architecture, the user is able to request a test and receive reports from the testing institution without delay. Also, a defense agency is able to conveniently prove the authenticity of the test reports and utilize the statistical data collected by the architecture. Therefore, we expect that the proposed system architecture will help defense agencies to prevent the forgery and alteration of test reports and ensure their reliability and quality.

• Journal of KIISE:Computer Systems and Theory
• /
• v.33 no.1_2
• /
• pp.137-146
• /
• 2006

Traditional live video streaming systems support the limited field of view (FOV) of image to the remote users. A server system based on the pan/tilt camera provides a user with wide view by changing the view direction of the camera mechanically. But, when many clients try to access to the server, this system can not offer their own view to every user simultaneously, and moreover it has the delay by camera motion. In order to offer wide views to several users, we propose new streaming system using the panorama image that has wide view. Our system is a kind of implementation of software pan/tilt camera. The server acquires panorama video and sends a part of the video to clients. Then, each client can control their own view. We need the effective way to reduce the average transmission data size and server burden to the compression because generally the full size of panorama video is too big to be served by the real-time streaming. To solve this problem, we propose an strip-based video compression and adaptive transmission of the compressed multiple strip videos. Experimental results show that our system can be adapted quickly to the change of view and the number of clients. Furthermore, proposed method effectively reduce the transmission data.

• Journal of Convergence for Information Technology
• /
• v.10 no.2
• /
• pp.39-48
• /
• 2020

Many studies have been conducted to analyze factors that affect customer satisfaction, and service quality improvement in the parcel delivery industry. Most of these studies have a limited number of respondents using methods such as surveys and interviews. Therefore, this study aims to supplement the shortcomings of previous studies, by searching and analyzing the common major topics related to the complaints pointed out by consumers and suppliers in the parcel delivery service with cases of consumer counseling, and articles that reflect the complaints of workers in the industry. In addition, by analyzing the trend of these topics, we attempted to discover new topics and suggest implications. In conclusion, topics such as delay/lost/wrong deliveries as well as the fierce competition in the parcel delivery industry, turned out to be central aspects. As a result of the topic trend analysis, talks with international couriers have recently increased, and many conflicts related to apartment parcel delivery have been dealt with. The topics presented in this study are mainly focused on the contents of previous studies, but we expect that new and valuable topics can be derived by adding other data and analysis methods, such as internal counseling and academic literature.

• The Journal of the Institute of Internet, Broadcasting and Communication
• /
• v.15 no.3
• /
• pp.99-105
• /
• 2015

This paper deals with the mMMA (modified MMA) which possible to improving the convergence speed that employing the serial connecting form of two stage digital filter instead of signal filter of MMA adaptive equalizer without applying the variable step size for compensates the intersymbol interference by channel distortion in the nonconstant modulus signal. The adaptive equalizer can be implemented by signal digital filter using the finite order tap delay line. In this paper, the equalizer is implemented by the two stage serial form and the filter coefficient are updated by the error signal using the same algorithm of MMA in each stage. The fast convergence speed is determined in the first stage, and the residual isi left at the output of first stage output is minimized in the second stage filter. The same digital filter length was considered in single stage and two stage system and the performance of these systems were compared. The performance index includes the output signal constellation, the residual isi and maximum distortion, MSE that is measure of the convergence characteristics, the SER. As a result of computer simulation, mMMA that has a FIR structure of two stage, has more good performance in every performance index except the constellation diagram due to equalization noise and improves the convergence speed about 1.5~1.8 time than the present MMA that has a FIR structure of single stage.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.43 no.6 s.348
• /
• pp.9-17
• /
• 2006

We proposed a new High-speed CMOS Level Up/Down Shifter circuits that can be used with Dynamic Voltage and Frequency Scaling(DVFS) algorithm, for low power system in the SoC(System-on-Chip). This circuit used to interface between the other voltage levels in each CMOS circuit boundary, or between multiple core voltage levels in a system bus. Proposed circuit have advantage that decrease speed attenuation and duty ratio distortion problems for interface. The level up/down shifter of the proposed circuit designed that operated from multi core voltages$(0.6\sim1.6V)$ to used voltage level for each IP at the 500MHz input frequency The proposed circuit supports level up shifting from the input voltage levels, that are standard I/O voltages 1.8V, 2.5V, 3.3V, to multiple core voltage levels in between of $0.6V\sim1.6V$, that are used internally in the system. And level down shifter reverse operated at 1Ghz input frequency for same condition. Simulations results are shown to verify the proposed function by Hspice simulation, with $0.6V\sim1.6V$ CMOS Process, $0.13{\mu}m$ IBM CMOS Process and $0.65{\mu}m$ CMOS model parameters. Moreover, it is researched delay time, power dissipation and duty ration distortion of the output voltage witch is proportional to the operating frequency for the proposed circuit.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.37 no.8
• /
• pp.86-96
• /
• 2000

The representative area among the ones whose cost increases as the integration ratio increases is the test area. As the relative cost of hardware decreases, the BIST method has been focued on as the future-oriented test method. The biggest drawback of it is the increasing test time to obtain the acceptable fault coverage. This paper proposed a BIST implementation method to reduce the test times. This method uses an input grouping and test point insertion method, in which the definition of test point is different from the previous one. That is, the test points are defined on the basis of the internal nodes which are the reference points of the input grouping and are merging points of the grouped signals. The main algorithms in the proposed method were implemented with C-language, and various circuits were used to apply the proposed method for experiment. The results showed that the test time could be reduced to at most $1/2^{40}$ of the pseudo-random pattern case and the fault coverage were also increased compared with the conventional BIST method. The relative hardware overhead of the proposed method to the circuit under test decreases as th e size of the circuit to be tested increases, and the delay overhead by the BIST utility is negligible compared to that of the original circuit. That means, the proposed method can be applied efficiently to large VLSI circuits.

• Journal of the Institute of Electronics Engineers of Korea TC
• /
• v.47 no.6
• /
• pp.10-21
• /
• 2010

In the cluster-tree network which covers wide area network and has many nodes for monitoring purpose traffic is concentrated around the sink. There are long transmit delay and high data loss due to the intensive traffic when IEEE 802.15.4 is adapted to the cluster-tree network. In this paper we propose Dynamic Channel Allocation algorithm which dynamically allocates channels to increase the channel usage and the transmission success rate. To evaluate the performance of DCA, we assumed the monitoring network that consists of a cluster-tree in which sensing data is transmitted to the sink. Analysis uses the traffic data which is generated around the sink. As a result, DCA is superior when much traffic is generated. During the experiment assuming the least amount of traffic, IEEE 802.15.4, has the minimum length of active period and 90% data transmission success rate. However DCA maintains 11.8ms of active period length and results in 98.9% data transmission success rate.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.47 no.8
• /
• pp.56-63
• /
• 2010

This work proposes a 12b 100MS/s 0.13um CMOS pipeline ADC for battery-powered mobile video applications such as DVB-Handheld (DVB-H), DVB-Terrestrial (DVB-T), Satellite DMB (SDMB), and Terrestrial DMB (TDMB) requiring high resolution, low power, and small size at high speed. The proposed ADC employs a three-step pipeline architecture to optimize power consumption and chip area at the target resolution and sampling rate. A single shared and switched op-amp for two MDACs removes a memory effect and a switching time delay, resulting in a fast signal settling. A two-step reference selection scheme for the last-stage 6b FLASH ADC reduces power consumption and chip area by 50%. The prototype ADC in a 0.13um 1P7M CMOS technology demonstrates a measured DNL and INL within 0.40LSB and 1.79LSB, respectively. The ADC shows a maximum SNDR of 60.0dB and a maximum SFDR of 72.4dB at 100MS/s, respectively. The ADC with an active die area of 0.92 $mm^2$ consumes 24mW at 1.0V and 100MS/s. The FOM, power/($f_s{\times}2^{ENOB}$), of 0.29pJ/conv. is the lowest of ever reported 12b 100MS/s ADCs.

• Journal of the Institute of Electronics Engineers of Korea TC
• /
• v.44 no.1
• /
• pp.138-145
• /
• 2007

Wireless transmission system using the multipath channel is affected ISI due to the delay spread. So we use a decision feedback equalizer which consist of decision part and feedback filter for remove the ISI effectively. In this paper, we propose a improved adaptive decision feedback equalizer to mitigate ISI effectively. The proposed adaptive decision feedback equalizer is construct by using soft decision device and hierarchical feedback filter based on MMSE sub-optimal equalizer using the LMS algorithm. Soft decision device mitigate the error propagation in feedback filter by incorrectly detected decision symbol and feedback filter which is divided two step independently mitigate the ISI by using a adaptive algorithm. As a result this structure shows better performance than conventional decision feedback equalizer by mitigating the error propagation in filter cause incorrectly detecting symbol. and we get the MSE more rapidly by using larger step-size due to reduce the number of feedback filter tap. In computer simulation, we compare the bit error rate performance of proposed decision feedback equalizer with conventional one on the S-V channel model for UWB system.