• Title/Summary/Keyword: Information Delay

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Network Coding delay analysis under Dynamic Traffic in DCF without XOR and DCF with XOR (DCF와 DCF with XOR에서 동적인 트래픽 상태에 따른 네트워크 코딩 지연시간 분석)

  • Oh, Ha-Young;Lee, Junjie;Kim, Chong-Kwon
    • Journal of KIISE:Information Networking
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    • v.36 no.3
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    • pp.251-255
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    • 2009
  • Network coding is a promising technology that increases the system throughput via reducing the number of transmission for a packet delivered from the source node to the destination node. Nevertheless, it suffers from the metrics of end-to-end delay. Network Coding scheme takes more processing delay which occurs as coding node encodes (XOR) a certain number of packets that relayed by the coding node, and more queuing delay which occurs as a packet waits for other packets to be encoded with. Therefore, in this paper, we analyze the dependency of the queuing delay to the arrival rate of each packet. In addition, we analyze and compare the delay in DCF without XOR and DCF with XOR under dynamic traffic.

Microwave Group Delay Time Adjuster Using Resonance Circuit (공진 회로를 이용한 마이크로파 군지연 시간 조정기)

  • Seo Su-Jin;Park Sang-Keun;Choi Heung-Jae;Jeong Yong-Chae;Yun Jae-Hun;Kim Chul-Dong
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.17 no.8 s.111
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    • pp.739-745
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    • 2006
  • This paper presents a method to control group delay tine using a resonance circuit. The group delay time adjuster(GDTA) that can control signal group delay time comprises a variable capacitance and a variable equivalent inductor. These are coupled in parallel at a node and also controlled by two bias voltages separately, A variable equivalent inductor is realized a transmission line terminated a variable capacitor. Group delay time can be controlled by change of capacitance and inductance, but the resonating frequency is fixed. When the proposed GDTA is fabricated on RFID Korean frequency band$(908.5{\sim}914 MHz)$, a group delay variation is obtained about 3 ns.

A Design of an Integer-N Dual-Loop Phase.Delay Locked Loop (이중루프 위상.지연고정루프 설계)

  • Choi, Young-Shig;Choi, Hyek-Hwan
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.15 no.7
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    • pp.1552-1558
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    • 2011
  • In this paper, a dual-loop Integer-N phase-delay locked loop(P DLL) architecture has been proposed using a low power consuming voltage controlled delay line(VCDL). The P DLL can have the LF of one small capacitance instead of the conventional second or third-order LF which occupies a large area. The proposed dual-loop P DLL can have a small gain VCDL by controlling the magnitude of capacitor and charge pump current on the loop of VCDL. The proposed dual-loop P DLL has been designed based on a 1.8V $0.18{\mu}m$ CMOS process and proved by Hspice simulation.

Delay Factors Based on the Importance of Finish Work in Apartment Construction Project (공동주택 마감공사 중요도 기반 작업지연 요인 분석)

  • Lee, Seung-Hoon;Lee, Sang-Hyo;Kim, Ju-Hyung;Kim, Jae-Jun
    • Proceedings of the Korean Institute of Building Construction Conference
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    • 2010.05a
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    • pp.125-129
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    • 2010
  • The ultimate goal of construction is to complete the given work in the most economical and safest way within the required construction period while meeting the quality standards specified in the design drawing. There are a few characteristics of finish work. First, executed in subdivided processes, finish work involves a very diverse and complex structure. Second, there are no criteria for each segmented process with regard to the appropriate time of input. Third, it is not very necessary to set priorities for lead and lag works. This study intends to provide information on the completion of a project in accordance with the required duration by setting priorities in the delay of each detailed process of finish work to minimize delay in finish work. In this study, finish work is divided into wet work and other types of finish work, and the importance of each process is classified based on the given details of each process. In addition, the study employs a survey to analyze delay factors of a designer, a constructor, and a supplier. Using the survey results, the study sets priorities in delay of final work to provide information on the completion of an apartment project within the planned construction period.

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Performance Improvement of Delay-Tolerant Networks with Mobility Control under Group Mobility

  • Xie, Ling Fu;Chong, Peter Han Joo
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.9 no.6
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    • pp.2180-2200
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    • 2015
  • This paper considers mobility control to improve packet delivery in delay-tolerant networks (DTNs) under group mobility. Based on the group structure in group mobility, we propose two mobility control techniques; group formation enforcement and group purposeful movement. Both techniques can be used to increase the contact opportunities between groups by extending the group's reachability. In addition, they can be easily integrated into some existing DTN routing schemes under group mobility to effectively expedite the packet delivery. This paper is divided into 2 parts. First, we study how our proposed mobility control schemes reduce the packet delivery delay in DTNs by integrating them into one simple routing scheme called group-epidemic routing (G-ER). For each scheme, we analytically derive the cumulative density function of the packet delivery delay to show how it can effectively reduce the packet delivery delay. Then, based on our second proposed technique, the group purposeful movement, we design a new DTN routing scheme, called purposeful movement assisted routing (PMAR), to further reduce the packet delay. Extensive simulations in NS2 have been conducted to show the significant improvement of PMAR over G-ER under different practical network conditions.

Voltage Feedforward Control with Time-Delay Compensation for Grid-Connected Converters

  • Yang, Shude;Tong, Xiangqian
    • Journal of Power Electronics
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    • v.16 no.5
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    • pp.1833-1842
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    • 2016
  • In grid-connected converter control, grid voltage feedforward is usually introduced to suppress the influence of grid voltage distortion on the converter's grid-side AC current. However, owing to the time-delay in control systems, the suppression effect of the grid voltage distortion is seriously affected. In this paper, the positive effects of the grid voltage feedforward control are analyzed in detail, and the time-delay caused by the low-pass filter (LPF) in the voltage filtering circuits and digital control are summarized. In order to reduce the time-delay effect on the performance of the feedforward control, a voltage feedforward control strategy with time-delay compensation is proposed, in which, a leading correction of the feedforward voltage is used. The optimal leading step used in this strategy is derived from analyzing the phase-frequency characteristics of a LPF and the implementation of digital control. By using the optimal leading step, the delay in the feedforward path can be further counteracted so that the performance of the feedforward control in terms of suppressing the influence of grid voltage distortion on the converter output current can be improved. The validity of the proposed method is verified through simulation and experiment results.

Delay characteristics of speech packets in virtual cellular network(VCN) (가상 셀룰라 망(VCN)에서의 음성 패킷 지연 특성)

  • 정명순;김화종
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.23 no.9A
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    • pp.2305-2312
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    • 1998
  • This paper analyzed the delay characteristics of speech packets in virtual cellular network(VCN). The probability distribution of packet delay is obtained using the markov chain model when periodic speech packets are transmitted by slotted-ALOHA protocol. The effects of probility of capture and retransmission policy on the performance were also analyzed. At first, the probability cumulative function of packet delay is calculated from the probability of capture as a function of location of mobile terminal. In order to investigate the effects of backoff delay, we defined a parameter NPr, where N is the period (frame size) of the speech packets and Pr is the retransmission probability for each speech packet. We also obtained the 1% outage delay for various frame size N.

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CMOS Inverter Delay Model Using the Triangle-shaped Waveform of Output Current (삼각형 모양의 출력 전류 모형을 이용한 CMOS 인버터 지연 모사)

  • Choi, Deuk-Sung
    • 전자공학회논문지 IE
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    • v.48 no.3
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    • pp.1-9
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    • 2011
  • In this paper, we develop an analytical expression for the propagation delay of submicrometer CMOS inverter using the triangle-shaped waveform of output current and two fitting parameters. Our model shows that simulation results are well in accordance with HSPICE results. Maximum simulation errors of total inverter delay and jitter are below 0.6% and 2.8%, respectively. Comparing with previous researches, the new model has better fittering characteristics in the range of low operating voltage. We also have fabricated the inverters with ten chains and estimated inverter delay and jitter characteristics. The results show that the values of delay and jitter in the fabricated samples come close to the values of those in the new model.

Adaptive Microphone Array System with Self-Delay Estimator (지연 추정 기능을 갖는 적응 마이크로폰 어레이 알고리즘)

  • Jung Yang-Won;Kang Hong-Goo;Lee Chungyong;Youn Dae Hee
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.30 no.1C
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    • pp.54-60
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    • 2005
  • In this Paper, an adaptive microphone array system with self-delay estimator is proposed. By showing that the adaptive blocking matrix (ABM) of the generalized sidelobe canceller (GSC) can estimate the relative time delay between each sensor, the proposed system utilizes the ABM not only for blocking target components in the blocked signal path, but also for estimating the relative time delay. Therefore, the proposed system requires only the GSC structure while maintaining the system performance similar to the conventional system using an additional time delay estimator as a preprocessor. Simulation results show that the performance of the proposed system is identical to the conventional system that uses an additional time delay estimation module.

Impact of Cryptographic operations on the QoS of VoIP system (VoIP 보안 시스템의 QoS 측정 및 분석)

  • 홍기훈;정수환;유현경;김도영
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.28 no.10B
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    • pp.916-926
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    • 2003
  • The encryption of packets increases delay and delay jitter that may degrade the quality of service (QoS) in real-time communications. So, we analyzed the delay jitter, delay, and interval delay between consecutive packets which were encrypted by the DES, 3DES, SEED and AES algorithms in this study. The interval delay and jitter of three algorithms such as the DES, SEED, AES were similar to the results of no encryption. But in the case of 3DES, the encryption of packets increases the variance of interval delay and jitter in comparison with other algorithms. we also analyzed properties of security and an efficiency of RTP security between SRTP and H.235.