• Journal of Power Electronics
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• v.17 no.3
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• pp.704-715
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• 2017

For three-phase synchronization applications, the synchronous reference frame phase-locked loop (SRF-PLL) is probably the most widely used technique due to its ease of implementation and satisfactory phase tracking performance under ideal grid conditions. However, under unbalanced and distorted grid conditions, its performance tends to worsen. To deal with this problem, a variety of filtering stages have been proposed and used in SRF-PLLs for the rejection of disturbance components at the cost of degrading the dynamic performance. In this paper, to improve dynamic performance without compromising the filtering capability, an effective hybrid filtering stage is proposed and incorporated into the inner loop of a quasi-type-1 PLL (QT1-PLL). The proposed filtering stage is a combination of a moving average filter (MAF) and a modified delay signal cancellation (DSC) operator in cascade. The time delay caused by the proposed filtering stage is smaller than that in the conventional MAF-based and DSC-based PLLs. A small-signal model of the proposed PLL is derived. The stability is analyzed and parameters design guidelines are given. The effectiveness of the proposed PLL is confirmed through experimental results.

• IEIE Transactions on Smart Processing and Computing
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• v.6 no.2
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• pp.93-101
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• 2017

This paper proposes an algorithm for adaptive loop filter (ALF) complexity reduction in the decoding process. In the original ALF algorithm, filtering for I frames is performed in the frame unit, and thus, all of the pixels in a frame are filtered if the current frame is an I frame. The proposed algorithm is designed on top of the local gradient calculation. On both the encoder side and the decoder side, homogeneous areas are checked and skipped in the filtering process, and the filter coefficient calculation is only performed in the inhomogeneous areas. The proposed algorithm is implemented in Joint Exploration Model (JEM) version 3.0 future video coding reference software. The proposed algorithm is applied for frame-level filtering and intra configuration. Compared with the JEM 3.0 anchor, the proposed algorithm has 0.31%, 0.76% and 0.73% bit rate loss for luma (Y) and chroma (U and V), respectively, with about an 8% decrease in decoding time.

• Journal of Institute of Control, Robotics and Systems
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• v.14 no.8
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• pp.727-732
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• 2008

In this paper, the state-space representation of generalized complimentary filter is proposed. Complementary filter has the suitable structure to merge information from sensors whose frequency regions are complementary. First, the basic concept and structure of complementary filter is introduced. And then the structure of the generalized filter and its state-space representation are proposed. The state-space representation of complementary filter is able to design the complementary filter by applying modern filtering techniques like Kalman filter and $H_{\infty}$ filter. To show the usability of the proposed state-space representation, the design of Inertial Navigation System(INS) vertical channel damping loop using Global Positioning System(GPS) is described. The proposed GPS/INS damping loop lends the structure of Baro/INS(Barometer/INS) vertical channel damping loop that is an application of complementary filter. GPS altitude error has the non-stationary statistics although GPS offers navigation information which is insensitive to time and place. Therefore, $H_{\infty}$ filtering technique is selected for adding robustness to the loop. First, the state-space representation of GPS/INS damping loop is acquired. And next the weighted $H_{\infty}$ norm proposed in order to suitably consider characteristics of sensor errors is used for getting filter gains. Simulation results show that the proposed filter provides better performance than the conventional vertical channel loop design schemes even when error statistics are unknown.

• Transactions on Control, Automation and Systems Engineering
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• v.3 no.1
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• pp.27-31
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• 2001

In this paper, we consider the guaranteed cost filtering design method for time-varying delay system with parameter uncertainties by LMI(Linear Matrix Inequality) approach. The objective is to design a stable guaranteed cost filter which minimizes the guaranteed cost fo the closed loop systems in filtering error dynamics. The sufficient conditions for the existence of filter, the guaranteed cost filter design method, and th guaranteed cost upper bound are proposed by LMI technique in terms of all finding variables. Finally, we give an example to check the validity of the proposed method.

• Journal of Broadcast Engineering
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• v.22 no.3
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• pp.313-320
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• 2017

The In-loop filtering methods such as de-blocking filter and SAO(Sample Adaptive Offset) applied to the HEVC standard achieves coding efficiency and subjective quality improvement by reducing the blocking artifacts and the ringing artifacts. However, despite the use of In-loop filtering methods, the artifacts called a corner outlier occurring at the corner points of block boundaries are not removed. In this paper, the corner outlier artifacts are reduced by the detection, determination, and filtering processes on the corner outlier pixels. Experimental results show that the proposed method improves the subjective picture quality and slightly increases the coding efficiency in Inter prediction.

• Journal of the Korea Society for Simulation
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• v.6 no.2
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• pp.45-57
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• 1997

MAC (media access control) bridge is used to interconnect separate LANs and to relay frames between the BLANs (bridged LANs). Bridge architecture consists of MAC entity, MAC relay entity and bridge protocol entity protocol entity and performs learning, filtering and forwarding functions using filtering database. In this paper, we simulate these functions of bridge and the STP (spanning tree protocol). The STP derives an active topology from an arbitrarily connected BLAN. Our simulation model assumes a BLAN consisted of three bridge forming a closed loop. In order to remove the loop, each bridge process exchanges configruation BPDU (bridge protocol data unit0 with other bridge processes connected to the bridge itself. To simulate the communication between bridges, we implement the IPC (inter-process communication) server using message queues. Our simulation results show that the assumed BLAN contains no closed loop and then there is no alternative route and no unnecessary traffic.

• 한국ITS학회:학술대회논문집
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• v.2006 no.10
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• pp.37-44
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• 2006

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.41 no.5
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• pp.217-223
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• 2004

In block-based lossy video compression, severe quantization causes discontinuities along block boundaries so that annoying blocking artifacts are visible in decoded video images. These blocking artifacts significantly decrease the subjective image quality. In order to reduce the blocking artifacts in decoded images, many algorithms have been proposed. However studies on so called comer outlier, have been very limited. Corner outliers make image edges look disconnected from those of neighboring blocks at cross block boundary. In order to solve this problem we propose a corner outlier detection and compensation algorithm as loop-filtering in spatial domain. Experiment results show that the proposed method provides much improved subjective image quality.

• The Magazine of the IEIE
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• v.38 no.8
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• pp.46-55
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• 2011

• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.5C
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• pp.534-539
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• 2006

In this paper, we propose a new frame prediction filtering technique and a hardware(H/W) architecture for scalable video coding. We try to evaluate MCTF(motion compensated temporal filtering) and hierarchical B-picture which are a technique for eliminate correlation between video frames. Since the techniques correspond to non-causal system in time, these have fundamental defects which are long latency time and large size of frame buffer. We propose a new architecture to be efficiently implemented by reconfiguring non-causal system to causal system. We use the property of a repetitive arithmetic and propose a new frame prediction filtering cell(FPFC). By expanding FPFC we reconfigure the whole arithmetic architecture. After the operational sequence of arithmetic is analyzed in detail and the causality is imposed to implement in hardware, the unit cell is optimized. A new FPFC kernel was organized as simple as possible by repeatedly arranging the unit cells and a FPFC processor is realized for scalable video coding.