• The Transactions of the Korea Information Processing Society
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• v.7 no.1
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• pp.266-272
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• 2000

The square-based multiplication using look-up table simplifies the process and speeds-up the operating speed. However, the look-up table size increases exponentially as bit size increases. Recently, Wey and Shieh introduced a noble design of square generator circuit using a folding approach for high-speed performance applications. The design uses the ones complement values of ROM addresses to fold the huge look-up ROM table repeatedly such that a much smaller table can be sufficient to store the squares. We present new folding techniques that do not require a ones complement part, one of three major parts in the Wey and Shiehs method. Also the proposed techniques reduce the bit size of partial sums such that the hardware implementation be simplified and the performance be enhanced.

• Proceedings of the Korean Information Science Society Conference
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• 2005.07b
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• pp.148-150
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• 2005

오늘날 XML이 디지털 정보교환의 표준으로 자리잡은 후 XML문서를 데이터베이스에 저장하고 원하는 정보를 효율적으로 질의하기 위한 연구가 활발히 진행되고 있다. 특히 XML질의어를 RDBMS 상에서 처리하기 위해 그리고 XML문서정보를 정확하게 추출하여 효율적으로 관리하기 위해 다양한 기법을 동원한 XML 인덱스 Table의 연구가 계속 되고 있다. 하지만 아무리 설계가 잘 된 XML인덱스 table이라 할지라도 이에 저장될 정보들을 XML문서로부터 빠른 시간에 파싱하여 관계형 테이블에 로드하기가 쉽지 않다. 이에 본 논문에서는 RDMS환경에서 XML문서를 관리하고 질의를 처리할 수 있도록 XML 인덱스 table을 디자인하였으며 이에 정확한 값이 좋은 성능을 가지면서 저장되도록 XML문서의 데이터 정보를 추출하는 XML Analyzer를 설계 및 구현하였다. 우선 Analyzer를 구현하기 위해서는 XML Parser를 사용해야 되는데 본 장에서는 이벤트 기반 방식인 SAX를 통해 XML문서를 파싱하여 데이터를 추출하고 그 결과값을 RDMS상의 XML 인덱스 Table에 저장한다. 마지막으로 이를 실제 구현하고 Test한 내용을 근거로 하여 본 장에서 소개하는 XML Analyzer가 다른 방식보다 성능면에서 훨씬 우수하다라는 사실을 입증한다.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.30B no.5
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• pp.27-33
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• 1993

This paper describes the hardware implementation of 2-D FIR digital filter for a real-time image processing. Generally, the most time-consuming operation in signal processing is the multiplication operation. To avoid it in digital filter. Pelid and Liu proposed the distributed arithmetic method for the one-dimensional case. The implementation method proposed in this paper is to extend Pelid's method to two-dimensional FIR filter using simple ROM lookup table and to use the technique of pipe lining two main operations of memory access and arithmetic. As a result, the speed of our proposed hardware implementation is two times faster than that of conventional methods and can be close to the real time speed.

• ETRI Journal
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• v.32 no.3
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• pp.370-379
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• 2010

In this paper, we propose efficient masking methods for ARIA and AES. In general, a masked S-box (MS) block can be constructed in different ways depending on the implementation platform, such as hardware and software. However, the other components of ARIA and AES have less impact on the implementation cost. We first propose an efficient masking structure by minimizing the number of mask corrections under the assumption that we have an MS block. Second, to make a secure and efficient MS block for ARIA and AES, we propose novel methods to solve the table size problem for the MS block in a software implementation and to reduce the cost of a masked inversion which is the main part of the MS block in the hardware implementation.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.6
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• pp.22-34
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• 2010

Existing image scalers generally adopt simple interpolation methods such as bilinear method to take cost-benefit, or highly complex architectures to achieve high quality resulting images. However, demands for a low power, low cost, and high performance image scaler become more important because of emerging high quality mobile contents. In this paper we propose the novel low power hardware architecture for a high quality raster scan image scaler. The proposed scaler architecture enhances the existing cubic interpolation look-up table architecture by reducing and optimizing memory access and hardware components. The input data buffer of existing image scaler is replaced with line memories to reduce the number of memory access that is critical to power consumption. The cubic interpolation formula used in existing look-up table architecture is also rearranged to reduce the number of the multipliers and look-up table size. Finally we analyze the optimized parameter sets of look-up table, which is a trade-off between quality of result image and hardware size.

• Journal of the HCI Society of Korea
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• v.1 no.2
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• pp.51-58
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• 2006

Information visualization, generally speaking, consists of three steps: transform from raw data to data model, visual mapping from data model to visual structure, and transform from visual structure to information model. In this paper, we propose a visual mapping method from spatiotemporal table information, which is related to events in large-scale building, to 3D map metaphor. The process has also three steps as follows. First, after analyzing the table attributes, we carefully define a context to fully represent the table-information. Second, we choose meaningful attribute sets from the context. Third, each meaningful attribute set is mapped to one well defined visual structure. Our method has several advantages. First, users can intuitively achieve non-spatial information through the 3D map which is a powerful spatial metaphor. Second, this system shows various visual mapping method applicable to other data models in the form of table, especially GIS. After describing the whole concept of our visual mapping, we will show the results of implementation for several requests.

• Journal of the Korea Society of Computer and Information
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• v.19 no.4
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• pp.111-122
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• 2014

Legislation are social norms that give directly or indirectly, huge impact on the social or corporate, personal problems, unlike a normal document. Also, over time it has a feature constantly changing by the laws enactment and amendment, repealed. The amendment statement automatic generated system is used for purpose of proclamation to those. However, existing system is able to generate amendment statement just text body of law how compare and analyze the current legislation and amendment legislation. However, actual legislation to be created attached table of the table form in complex structure besides simple text form as body text. In this paper, we additional implement attached table processing to existing the amendment statement automatic generated system that containing the table does not handle attached table. We were analyse to the amendment statement generated grammar and table structure in attached table of the legislation for processing to attached table. Also proposed a method to compare attached table in the table. So, it is enable the automatic generation with amendment statement which various forms of legislation the documents.

• IEMEK Journal of Embedded Systems and Applications
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• v.9 no.6
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• pp.335-344
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• 2014

As a kind of 2D spatial coordinate transform, image warping is a basic image processing technique utilized in various applications. Though image warping algorithm is composed of relatively simple operations such as memory accesses and computations of weighted average, real-time implementations on embedded vision systems suffer from limited computational power because the simple operations are iterated as many times as the number of pixels. This paper presents a real-time implementation of a look-up table(LUT)-based image warping using an FPGA. In order to ensure sufficient data transfer rate from memories storing mapping LUT and image data, appropriate memory devices are selected by analyzing memory access patterns in an LUT-based image warping using backward mapping. In addition, hardware structure of a parallel and pipelined architecture is proposed for fast computation of bilinear interpolation using fixed-point operations. Accuracy of the implemented hardware is verified using a synthesized test image, and an application to real-time lens distortion correction is exemplified.

• ETRI Journal
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• v.36 no.6
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• pp.905-912
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• 2014

In this paper, a new architecture is proposed to achieve complexity efficiency in implementing variable pulse position modulation (VPPM). VPPM, specified in IEEE 802.15.7, can support wireless communication and dimming control simultaneously using visible light. The proposed architecture is based on the VPPM signal property in which the transition point of the modulated output is obtained by counting the sample index and comparing it to both the assigned dimming factor and the transmitting data. Therefore, the proposed architecture can be composed of simple logics, including a counter, a comparator, and an inverter, all of which are insensitive to the dimming resolution in contrast to a conventional codeword-table method. This paper describes the verification of the proposed algorithm through a register-transfer level implementation of the codeword and proposed architectures. In comparison with the codeword-table method, the proposed method gains a nine-fold complexity reduction at a 1% dimming-step resolution.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.31 no.3
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• pp.527-532
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• 2021

In this paper, we propose an efficient finite field computation method for Rainbow algorithm, which is the only multivariate quadratic-equation based digital signature among the current US NIST PQC standardization Final List algorithms. Recently, Chou et al. proposed a new efficient implementation method for Rainbow on the Cortex-M4 environment. This paper proposes a new multiplication method over the finite field that can reduce the number of XOR operations by more than 13.7% compared to the Chou et al. method. In addition, a multiplicative inversion over that can be performed by a 4x4 matrix inverse instead of the table lookup method is presented. In addition, the performance is measured by porting the software to which the new method was applied onto RaspberryPI 3B+.