• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2007.10a
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• pp.131-134
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• 2007

In this paper, we propose the 1D-CZP pattern for FPGA verification. The algorithm that was implemented by Verilog-HDL on FPGA board is verified before the chip is producted. Input through the external sensor might not be enough to verify the algorithm on FPGA board. Hence, both external input and internal input can lead the verification of the algorithm. This paper suggests the hardware implementation of compact 1D-CZP pattern that has the random input. It is useful to analyze the characteristics of the filter frequencies and organized as ROM Table which is efficient to Modulus operation.

• Journal of the Institute of Convergence Signal Processing
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• v.6 no.3
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• pp.134-142
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• 2005

The implementation of Multiple-Valued Logic(MVL) based on Current-Mode CMOS Logic(CMCL) circuits has recently been achieved. In this paper, four-valued Unary Multiple-Valued logic functions are synthesized using current-mode CMOS logic circuits. We properly make use of the fact that the CMCL addition of logic values represented using discrete current values can be performed at no cost and that negative logic values are readily available via reversing the direction of current flow. A synthesis process for CMCL circuits is based upon a logically complete set of basic elements. Proposed algorithm results in less expensive realization than those achieved using existing techniques in terms of the number of transistors needed. As an alternative to the cost-table techniques Universal Unary Programmable Circuit (UUPC) for a unary function is also proposed.

• Journal of IKEEE
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• v.21 no.3
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• pp.280-283
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• 2017

HEVC (high efficiency video coding) exploits CABAC (context-based adaptive binary arithmetic coding) for entropy coding, where a context model estimates the probability for each syntax element. In this paper, a context modeler was designed and implemented for CABAC decoding. lookup table was used to reduce computation and to increase speed. 12 simulations for HEVC standard test sequences and encoder configurations were performed, and the context modeler was verified to perform correction operations. The designed context modeler was synthesized in 0.18um technology. Maximum frequency, maximum throughput, and gate count are 200 MHz, 200 Mbin/s, and 29,268 gates, respectively.

• Journal of Electrical Engineering and Technology
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• v.9 no.4
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• pp.1411-1417
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• 2014

An MPEG-2 AAC Huffman decoding method based on the fixed length compacted codeword tables, where each codeword can contain multiple number of Huffman codes, was proposed. The proposed method enhances the searching efficiency by finding multiple symbols in a single search, i.e., a direct memory reading of the compacted codeword table. The memory usage is significantly saved by separately handling the Huffman codes that exceed the length of the compacted codewords. The trade-off relation between the computational complexity and the amount of memory usage was analytically derived to find the proper codeword length of the compacted codewords for the design of MPEG-2 AAC decoder. To validate the proposed algorithm, its performance was experimentally evaluated with an implemented MPEG-2 AAC decoder. The results showed that the computational complexity of the proposed method is reduced to 54% of that of the most up-to-date method.

• Journal of Power Electronics
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• v.2 no.2
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• pp.146-153
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• 2002

this paper presents an implementation of digital control system of speed sensorless for Reluctance Synchronous Motor (RSM) drives with direct torque control (DTC). The problem of DTC for high-dynamic performance RSM drive is generating a nonlinear torque due to a saturated nonlinear inductance curve with various load currents. The control system consists of stator flux observer, compensating inductance look-up table, rotor position/speed/torque estimator, two hysteresis band controllers, an optimal switching look-up table, IGBT voltage source unverter, and TMS320C31 DSP controller. The stator flux observer is based on the combined voltage and current model with stator flux feedback adapitve control that inputs are the compensated inductances, current and voltage sensing of motor terminal with estimated rotor angle for wide speed range. The rotor position is estimated rotor speed is determined by differentiation of the rotor position used only in the current model part of the flux observer for a low speed operation area. It does not requrie the knowledge of any montor paramenters, nor particular care for moter starting, In order to prove the suggested control algorithm, we have simulation and testing at actual experimental system. The developed sensorless control system is showing a good speed control response characterisitic result and high performance features in 20/1500 rpm with 1.0Kw RSM having 2.57 ratio of d/q reluctance.

• Proceedings of the Korea Information Processing Society Conference
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• 2010.11a
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• pp.1760-1762
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• 2010

본 논문에서 3치가산기와 승산기(multiplier)는 전류모드 CMOS에 의해서 구현된다. 첫째, 3치 T-gate를 집적회로 설계의 유효 가용성을 갖고 있는 전류모드 CMOS를 이용하여 구현한다. 둘째, 3치 T-gates를 이용해 회로가 유한체 GF (3)에 대하여 2변수 3치 가산표 (2-variable ternary addition table) 및 구구표 (multiplication table)가 실현되도록 구현한다. 마지막으로, 이러한 동작 회로들은 1.5 CMOS 표준 기술과 $15{\mu}A$ 단위전류(unit current) 및 3.3V 소스 전압 (VDD voltage)에 의해 활성화 된다. 활성화 결과는 만족할 만한 전류 특성을 나타냈다. 전류 모드 CMOS에 의하여 실행되는 3치가산기 및 승산기는 단순하며 와이어 라우팅(wire routing)에 대하여 정규적이고, 또한 셀 배열 (cell array)과 함께 모듈성 (modularity)의 특성을 갖고 있다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.34 no.4C
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• pp.403-413
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• 2009

We compare three predistortion methods to prevent signal distortion and spectral re-growth due to the high PAPR (peak-to-average ratio) of OFDM signal and the non-linearity of high-power amplifiers. The three predistortion methods are pth order inverse, indirect learning architecture and look up table. The pth order inverse and indirect learning architecture methods requires less memory and has a fast convergence because these methods use a polynomial model that has a small number of coefficients. Nevertheless the convergence is fast due to the small number of coefficients and the simple computation that excludes manipulation of complex numbers by separate compensation for the magnitude and phase. The look up table method is easy to implement due to simple computation but has the disadvantage that large memory is required. Computer simulation result reveals that indirect learning architecture shows the best performance though the gain is less than 1 dB at $BER\;=\;10^{-4}$ for 64-QAM. The three predistorters are adaptive to the amplifier aging and environmental changes, and can be selected to the requirements for implementation.

• The Journal of the Korea Contents Association
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• v.5 no.2
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• pp.187-197
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• 2005

In this paper, we propose an extended TB-tree, called ETB-tree, which can improve the performance of an existing TB-tree proposed for indexing the trajectories of moving objects in Location-Based Service(LBS). The proposed ETB-tree directly accesses the preceding node by maintaining a direct table, called D-Table which contains the page number in disk and memory pointers pointing the leaf node with the first and last lines segment of moving objects. It can improve the insertion performance by quick searching the preceding node of a moving object and retrieval performance owing to accessing directly the corresponding trajectories In disk for the trajectory-based query. In addition, the ETB-tree provides consistency of a tree by reflecting a newly inserted line segment to the tree both in memory and disk. The experimental results show that the proposed indexing technique gains better performance than other traditional ones with respect to the insertion and retrieval of a trajectory query.

• Speech Sciences
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• v.10 no.3
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• pp.241-250
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• 2003

In this paper, we implemented the vocoder of variable rate by applying the SOLA-B algorithm to the G.729A to the TMS320C5416 in real-time. This method using the SOLA-B algorithm is that it is reduced the duration of the speech in encoding and is played at the speed of normal by extending the duration of the speech in decoding. But the method applied to the existed G.729A and SOLA-B algorithm is caused the loss of speech quality in G.729A which is not reflected about length variation of speech. Therefore the proposed method is encoded according as it is modified the structure of LSP quantization table about the length of speech is reduced by using the SOLA-B algorithm. The vocoder of variable rate by applying the G.729A and SOLA-B algorithm is represented the maximum complexity of 10.2MIPS about encoder and 2.8MIPS about decoder in 8kbps transmission rate. Also it is evaluated 17.3MIPS about encoder, 9.9MIPS about decoder in 6kbps and 18.5MIPS about encoder, 11.1MIPS about decoder in 4kbps according to the transmission rate. The used memory is about program ROM 9.7kwords, table ROM 4.69kwords, RAM 5.2kwords. The waveform of output is showed by the result of C simulator and Bit Exact. Also, the result of MOS test for evaluation of speech quality of the vocoder of variable rate which is implemented in real-time, it is estimated about 3.68 in 4kbps.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2002.05a
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• pp.205-208
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• 2002

When establishing the submarine optical fiber table between international and domestic, marine survey in advance it grasps the submarine geological features which is accurate and a depth of water condition. And the route which is safe for selecting and submarine optical fiber cable laying it is a work which secures an ease one location. If also, the PLGR the submarine of optical fiber table root the sea contamination material (rope, wire and net) it removes in advance and if the submarine of the optical fiber cable ease it does to arrive safely. And it is a work the Plough and ROV laying work hour laying work efficiency improvement and laying equipment it will be able to protect. So, This paper presents the monitoring system of ship information management and operation for marine survey and PLGR work in submarine optical fiber table construction enterprise. In order to achieve these purpose, overall serial multi-port communication modulo of configuration, realtime processing for management and operation of receiving data, realtime graph and a printout are described.