• The Journal of Korea Institute of Information, Electronics, and Communication Technology
• /
• v.1 no.3
• /
• pp.111-117
• /
• 2008

Presentation with a projector and a laser pointer is widely used in seminar or conference. The function of a laser pointer in the presentation is just indicating a certain object. In this paper, to give a mouse-like function to a laser pointer, we implement a system that locates the track of a laser pointer. The system contains a FPGA that implements camera interface and noise filter. A software for ARM processor is programmed to analyze the spectrum of the captured image and track the pattern of a laser pointer with previously stored image. As a result, the tracking system could locate the position correctly most of time within 20m with 98% accuracy.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.39 no.11
• /
• pp.24-32
• /
• 2002

In this paper we implemented various image processing filtering using the format converter. This design method is based on realized the large processor-per-pixel array by integrated circuit technology. These two types of integrated structure are can be classify associative parallel processor and parallel process DRAM(or SRAM) cell. Layout pitch of one-bit-wide logic is identical memory cell pitch to array high density PEs in integrate structure. This format converter design has control path implementation efficiently, and can be utilize the high technology without complicated controller hardware. Sequence of array instruction are generated by host computer before process start, and instructions are saved on unit controller. Host computer is executed the pixel-parallel operation starting at saved instructions after processing start. As a result, we obtained three result that 1)simple smoothing suppresses higher spatial frequencies, reducing noise but also blurring edges, 2) a smoothing and segmentation process reduces noise while preserving sharp edges, and 3) median filtering, like smoothing and segmentation, may be applied to reduce image noise. Median filtering eliminates spikes while maintaining sharp edges and preserving monotonic variations in pixel values.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.16 no.8
• /
• pp.1759-1764
• /
• 2012

This paper describes FPGA design and realization using the shading correction algorithm for a CCD scan image enhancement. The shading algorithm is used by LUT (Look-up Table). The image enhancement results from that the histogram minimum value and maximum with respect to all pixels of the CCD image should be extracted, and the shading LUT is constructed to keep constant histogram with offset data. The output of sensor be converted to corrected LUT image in preprocessing, and the converting system is realized by FPGA to be enabled to operate in real time. The result of the experimentation for the proposed system is showed to take the scanning time 2.4ms below. The system is presented to be based on a low speed processor system to scan enhanced images in real time and be guaranteed to be low cost.

• The Journal of the Acoustical Society of Korea
• /
• v.28 no.4
• /
• pp.370-374
• /
• 2009

In this paper, we presents a new cone beam computerized tomography (CB CT) system for the reconstruction of 3 dimensional dynamic images. The system using cone beam has less the exposure of radioactivity than fan beam, relatively. In the system, the reconstruction 3-D image is reconstructed with the radiation angle of X-ray in the image processing unit and transmitted to the monitor. And in the image processing unit, the Three Pass Shear Matrices, a kind of Rotation-based method, is applied to reconstruct 3D image because it has less transcendental functions than the one-pass shear matrix to decrease a time of calculations for the reconstruction 3-D image in the processor. The new system is able to get 3~5 3-D images a second, reconstruct the 3-D dynamic images in real time.

• The Transactions of the Korean Institute of Electrical Engineers D
• /
• v.53 no.1
• /
• pp.1-9
• /
• 2004

In this paper, we proposed a hardware(H/W) structure which can compress and recontruct the input image in real time operation and implemented it into a FPGA platform using VHDL(VHSIC Hardware Description Language). All the image processing element to process both compression and reconstruction in a FPGA were considered each of them was mapped into a H/W with the efficient structure for FPGA. We used the DWT(discrete wavelet transform) which transforms the data from spatial domain to the frequency domain, because use considered the motion JPEG2000 as the application. The implemented H/W is separated to both the data path part and the control part. The data path part consisted of the image processing blocks and the data processing blocks. The image processing blocks consisted of the DWT Kernel for the filtering by DWT, Quantizer/Huffman Encoder, Inverse Adder/Buffer for adding the low frequency coefficient to the high frequency one in the inverse DWT operation, and Huffman Decoder. Also there existed the interface blocks for communicating with the external application environments and the timing blocks for buffering between the internal blocks. The global operations of the designed H/W are the image compression and the reconstruction, and it is operated by the unit or a field synchronized with the A/D converter. The implemented H/W used the 54％(12943) LAB(Logic Array Block) and 9％(28352) ESB(Embedded System Block) in the APEX20KC EP20K600CB652-7 FPGA chip of ALTERA, and stably operated in the 70MHz clock frequency. So we verified the real time operation. that is. processing 60 fields/sec(30 frames/sec).

• Journal of Korea Multimedia Society
• /
• v.14 no.3
• /
• pp.368-377
• /
• 2011

This paper explains the hardware structure of SURF(Speeded Up Robust Feature) based feature point extractor and its FPGA verification result. SURF algorithm produces novel scale- and rotation-invariant feature point and descriptor which can be used for object recognition, creation of panorama image, 3D Image restoration. But the feature point extraction processing takes approximately 7,200msec for VGA-resolution in embedded environment using ARM11(667Mhz) processor and 128Mbytes DDR memory, hence its real-time operation is not guaranteed. We analyzed integral image memory access pattern which is a key component of SURF algorithm to reduce memory access and memory usage to operate in c real-time. We assure feature extraction that using a Vertex-5 FPGA gives 60frame/sec of VGA image at 100Mhz.

• Journal of the Institute of Electronics Engineers of Korea SC
• /
• v.42 no.3 s.303
• /
• pp.17-24
• /
• 2005

Various defects are found in PDP manufacturing process. Detecting these defects early and reprocessing them is an important factor that reduces the cost of production. In this paper, the image processing system for the PDP pattern inspection is designed and implemented using the high performance and accuracy CCD line scan camera. For the preprocessing of the high speed line image data, the Image Processing Part (IPP) is designed and implemented using high performance DSP, FIFO and FPGA. Also, the Data Management and System Control Part (DMSCP) are implemented using ARM processor to control many IPP and cameras and to provide remote users with processed data. For evaluating implemented system, experiment environment which has an area camera for reviewing and moving shelf is made. Experimental results showed that proposed system was quite successful.

• Journal of Broadcast Engineering
• /
• v.19 no.3
• /
• pp.316-328
• /
• 2014

In this paper, we parallelize the popular feature detection algorithms, i.e. SIFT and SURF, and its application to fast panoramic image generation on the latest embedded GPU. Parallelized algorithms are implemented using recently developed OpenCL as the embedded GPGPU software platform. We compare the implementation efficiency and speed performance of conventional OpenGL Shading Language and OpenCL. Experimental result shows that implementation on OpenCL has comparable performance with GLSL. Compared with the performance on the embedded CPU in the same application processor, the embedded GPU runs 3~4 times faster. As an example of using feature extraction, panorama image synthesis is performed on embedded GPU by applying image matching using detected features.

• Management & Information Systems Review
• /
• v.4
• /
• pp.257-284
• /
• 2000

According as the drivers increase who have their cars, the comprehensive studies on the automobile for the traffic safety have been raised as the important problems. Visual Recognition System for radio-controled driving is a part of the sensor processor of Unmanned Autonomous Vehicle System. When a driver drives his car on an unknown highway or general road, it produces a model from the successively inputted road traffic information. The suggested Recognition System of the Road Traffic Safety Information Board is to recognize and distinguish automatically a Road Traffic Safety Information Board as one of road traffic information. The whole processes of Recognition System of the Road Traffic Safety Information Board suggested in this study are as follows. We took the photographs of Road Traffic Safety Information Board with a digital camera in order to get an image and normalize bitmap image file with a size of $200{\times}200$ byte with Photo Shop 5.0. The existing True Color is made up the color data of sixteen million kinds. We changed it with 256 Color, because it has large capacity, and spend much time on calculating. We have practiced works of 30 times with erosion and dilation algorithm to remove unnecessary images. We drawing out original image with the Region Splitting Technique as a kind of segmentation. We made three kinds of grouping(Attention Information Board, Prohibit Information Board, and Introduction Information Board) by RYB( Red, Yellow, Blue) color segmentation. We minimized the image size of board, direction, and the influence of rounding. We also minimized the Influence according to position. and the brightness of light and darkness with Eigen Vector and Eigen Value. The data sampling this feature value appeared after building the learning Code Book Database. The suggested Recognition System of the Road Traffic Safety Information Board firstly distinguished three kinds of groups in the database of learning Code Book, and suggested in order to recognize after comparing and judging the board want to recognize within the same group with Nearest Neighborhood Decision Making.

• The Transactions of the Korea Information Processing Society
• /
• v.6 no.9
• /
• pp.2540-2547
• /
• 1999

Chromakey method is one of key technologies for realizing virtual studio, and the blue portions of a captured image in virtual studio, are replaced with a computer generated or real image. The replaced image must be changed according to the camera parameter of studio for natural merging with the non-blue portions of a captured image. This paper proposes a novel method to extract camera parameters using the recognition of pentagonal patterns that are painted on a blue screen. We extract corresponding points between a blue screen. We extract corresponding points between a blue screen and a captured image using the projective invariant features of a pentagon. Then, calculate camera parameters using corresponding points by the modification of Tsai's method. Experimental results indicate that the proposed method is more accurate compared to conventional method and can process about twelve frames of video per a second in Pentium-MMX processor with CPU clock of 166MHz.