• Title/Summary/Keyword: IT Hardware

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A Study on Measurement System Development for Electric Equipments of Tilting Train Express (틸팅차량 전기장치 측정시스템 개발)

  • Han, Young-Jae;Kim, Seog-Won;Kim, Sang-Soo;Kim, Young-Guk;Koo, Hun-Mo
    • Proceedings of the KIEE Conference
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    • 2006.10d
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    • pp.250-252
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    • 2006
  • In this paper, we studied for the measurement system for on-line testing and evaluation of tilting train express(TTX). The measurement system is installed in each train for the performance measurement during the test run. It is composed of software part, hardware part and can measure various signals such as velocity, voltage, temperature. The software controls the hardware of the measurement system, performs the analysis and calculation of measurement data and acts as interface between users and the system hardware. The hardware is consisted of 7 DAMs(Data Acquisition Modules) and 6 monitoring modules.

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Hardware Simulator Development for a 3-Parallel Grid-Connected PMSG Wind Power System

  • Park, Ki-Woo;Lee, Kyo-Beum
    • Journal of Power Electronics
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    • v.10 no.5
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    • pp.555-562
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    • 2010
  • This paper presents the development of a hardware simulator for a 3-parallel grid-connected PMSG wind power system. With the development of permanent magnetic materials in recent years, the capacity of a PMSG based wind turbine system, which requires a full-scale power converter, has been raised up to a few MW. Since it is limited by the available semiconductor technology, such large amounts of power cannot be delivered with only one power converter. Hence, a parallel connecting technique for converters is required to reduce the ratings of the converters. In this paper, a hardware simulator with 3-parallel converters is described and its control issues are presented as well. Some experimental results are given to illustrate the performance of the simulator system.

Embedded Hardware Tests for a Distributed Power Quality Monitoring System (분산전원 전력품질 모니터링 시스템을 위한 임베디드 하드웨어 테스트)

  • Shin, Myong-Jun;Kim, Sung-Jong;Son, Young-Ik
    • Proceedings of the KIEE Conference
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    • 2006.10c
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    • pp.151-153
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    • 2006
  • When distributed powers are interconnected to the grid, lack of source stability may cause some events that should be measured and stored as soon as they occur. This paper presents a real-time hardware system that has been developed for quick and reliable monitoring of the distributed powers quality. The system is composed of a digital signal processor (MPC7410, Motorola) and a 16 bits A/D board (VMIVME3122, GE). To guarantee the real time operation, it is based on a real time OS (VxWorks). Hardware tests of the embedded system have been made to check the performances of the proposed system. Test signals of several events are generated by using a LabView (hardware) system. The tests show that the system complies with the desired IEEE standard for power quality monitoring.

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Design and Implementation of Binary Image Normalization Hardware for High Speed Processing (고속 처리를 위한 이진 영상 정규화 하드웨어의 설계 및 구현)

  • 김형구;강선미;김덕진
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.31B no.5
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    • pp.162-167
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    • 1994
  • The binary image normalization method in image processing can be used in several fields, Especially, its high speed processing method and its hardware implmentation is more useful, A normalization process of each character in character recognition requires a lot of processing time. Therefore, the research was done as a part of high speed process of OCR (optical character reader) implementation as a pipeline structure with host computer in hardware to give temporal parallism. For normalization process, general purpose CPU,MC68000, was used to implement it. As a result of experiment, the normalization speed of the hardware is sufficient to implement high speed OCR which the recognition speed is over 140 characters per second.

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AN ECHO CANCELLATION ALGORITHM FOR REDUCING THE HARDWARE COMPLEXITIES AND ANALYSIS ON ITS CONVERGENCE CHARACTERISTICS

  • LEE HAENG-WOO
    • Journal of applied mathematics & informatics
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    • v.20 no.1_2
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    • pp.637-645
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    • 2006
  • An adaptive algorithm for reducing the hardware complexity is presented. This paper proposes a simplified LMS algorithm for the adaptive system and analyzes its convergence characteristics mathematically. An objective of the proposed algorithm is to reduce the hardware complexity. In order to test the performances, it is applied to the echo canceller, and a program is described. The results from simulations show that the echo canceller adopting the proposed algorithm achieves almost the same performances as one adopting the NLMS algorithm. If an echo canceller is implemented with this algorithm, its computation quantities are reduced to the half as many as the one that is implemented with the LMS algorithm, without so much degradation of performances.

Efficient Hardware Montgomery Modular Inverse Module for Elliptic Curve Cryptosystem in GF(p) (GF(p)의 타원곡선 암호 시스템을 위한 효율적인 하드웨어 몽고메리 모듈러 역원기)

  • Choi, Piljoo;Kim, Dong Kyue
    • Journal of Korea Multimedia Society
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    • v.20 no.2
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    • pp.289-297
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    • 2017
  • When implementing a hardware elliptic curve cryptosystem (ECC) module, the efficient design of Modular Inverse (MI) algorithm is especially important since it requires much more computation than other finite field operations in ECC. Among the MI algorithms, binary Right-Shift modular inverse (RS) algorithm has good performance when implemented in hardware, but Montgomery Modular Inverse (MMI) algorithm is not considered in [1, 2]. Since MMI has a similar structure to that of RS, we show that the area-improvement idea that is applied to RS is applicable to MMI, and that we can improve the speed of MMI. We designed area- and speed-improved MMI variants as hardware modules and analyzed their performance.

A Construction of the Improved Hardware Arithmetic Operation Unit (개선된 하드웨어 산술연산기 구성)

  • Park, Chun-Myoung
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2015.10a
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    • pp.1023-1024
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    • 2015
  • This paper propose the method of constructing the improved hardware arithmetic operation unit over galois fields. The proposed the hardware arithmetic operation unit have advantage which is more regularity and extensibility compare with earlier method. Also it is able to apply to any multimedia hardware which is the basic arithmetic operation unit. For the future we will research the processor which is the processing arithmetic and logical operation.

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Application of thermoelectric module to DNA amplifying thermal cycle system (유전자(DNA)증폭 온도 사이클 시스템에 열전소자 활용을 위한 연구)

  • Cho, Jae-Seol;Jung, Se-Hun;Nam, Jae-Young;Choi, Jae-Boong;Kim, Young-Jin
    • Proceedings of the KSME Conference
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    • 2004.04a
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    • pp.210-215
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    • 2004
  • : A DNA analysis system based on fluorescence analysis has to have a DNA amplifying thermal cycle system. DNA amplification is executed by the temperature control. Accuracy of fluorescence analysis is influenced by the temperature control technology. For that reason, the temperature control is core technology in developing the DNA analysis system. Therefore, the objective of this paper is to develop the hardware to apply thermoelectric module to the DNA amplifying thermal cycle system. In order to verify the developed hardware for controlling the temperature of thermoelectric module, a DNA amplifying thermal cycle test was performed. From the test, the developed hardware controlled the temperature of thermoelectric module successfully. Therefore, it is expected that the developed hardware can be applied to the DNA amplifying thermal cycle system.

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A Research on Effective Cyber-Physical Systems Tests Using EcoHILS (EcoHILS를 활용한 효율적인 CPS 시험에 관한 연구)

  • Kim, Min-Jo;Kang, Sungjoo;Chun, In-Geol;Kim, Won-Tae
    • IEMEK Journal of Embedded Systems and Applications
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    • v.9 no.4
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    • pp.211-217
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    • 2014
  • Cyber-Physical Systems(CPS) that mostly provides safety-critical and mission-critical services requires high reliability, so that system testing is an essential and important process. Hardware-In-the-Loop Simulation(HILS) is one of the extensively used techniques for testing hardware systems. However, most conventional HILS has problems that it is difficult to support a distributed operating environment and to reuse a HILS platform. In this paper, we introduce EcoHILS(ETRI CPS Open Human-Interactive hardware-in-the-Loop Simulator) in order to test CPS effectively. Moreover, feasibility tests and performance tests of EcoHILS are performed to confirm its effectiveness.

Analysis for Patent Application Tendency in Intelligent Robot Hardware (지능형 로봇 하드웨어 특허동향 분석)

  • Kim, Seung-Min;Nahm, Yoon-Eui;Kim, Ji-Kwan
    • Journal of Korean Society of Industrial and Systems Engineering
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    • v.30 no.4
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    • pp.46-53
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    • 2007
  • This research relates to the patent application tendency about the hardware platform of the intelligent robot among the robotics industry in which the market is more and more expanded. The patent about the hardware field of intelligent robot was analyzed from not only Korea but also U.S., Japanese and Europe which is called as the 3 pole of patent. By this research the government which supervises the nation's research policy can obtain the objective information of the industrial tendency, so it can establish the investment policy of national research and development. And the researchers can set up the research direction for evasion from patent infringement trouble by obtaining the patent application information. This also shows whether their research can be competitive or not.