• Journal of KIISE:Information Networking
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• v.32 no.3
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• pp.427-432
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• 2005

Packet arrival rates in internet routers have been dramatically increased due to the advance of link technologies, and hence wire-speed packet processing in Internet routers becomes more challenging. As IP address lookup is one of the most essential functions for packet processing, algorithm and architectures for efficient IP address lookup have been widely studied. In this paper, we Propose an efficient I address lookup architecture which shows yeW good Performance in search speed while requires a single small-size memory The proposed architecture is based on multi-way tree structure which performs comparisons of multiple prefixes by one memory access. Performance evaluation results show that the proposed architecture requires a 280kByte SRAM to store about 40000 prefix samples and an address lookup is achieved by 5.9 memory accesses in average.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.1B
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• pp.18-28
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• 2004

Efficient hardware implementation of address lookup is one of the most important design issues of internet routers. Address lookup significantly impacts router performance since routers need to process tens-to-hundred millions of packets per second in real time. In this paper, we propose a practical IP address lookup structure based on the binary tree of prefixes of different lengths. The proposed structure produces multiple balanced trees, and hence it solve the issues due to the unbalanced binary prefix tree of the existing scheme. The proposed structure is implemented using pipelined binary search combined with a small size TCAM. Performance evaluation results show that the proposed architecture requires a 2000-entry TCAM and total 245 kbyte SRAMs to store about 30,000 prefix samples from MAE-WEST router, and an address lookup is achieved by a single memory access. The proposed scheme scales very well with both of large databases and longer addresses as in IPv6.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.28 no.2B
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• pp.138-143
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• 2003

One of the important design issues for IP routers responsible for packet forwarding in computer networks is the route-lookup mechanism. For each incoming packet, IP routing requires that a router performs a longest-prefix-match address lookup in order to determine the next hop that the incoming packet should be forwarded to. In this paper, we present a new scheme which applies the hashing function for IP address lookup. In the proposed scheme, the forwarding table is composed of multiple SRAMs, and each SRAM represents an address lookup table in each prefix. Hashing function is applied in order to find out the matching entries from the address lookup tables in parallel, and the entry with the longest prefix match among them is selected. Simulation using the MAE-WEST router example shows that a large routing table with 37000 entries can be compacted to a forwarding table of 300 Kbytes in the proposed scheme. It is also shown that the proposed scheme achieves one route lookup every 1.93 memory accesses in average.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.12C
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• pp.1642-1651
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• 2004

Advance of internet access technology requires more internet bandwidth and high-speed packet processing. IP address lookups in routers are essential elements which should be performed in real time for packets arriving tens-of-million packets per second. In this paper, we proposed a new architecture for efficient IP address lookup. The proposed scheme produces multiple balanced trees stored into a single SRAM. The proposed scheme performs sequential binary searches on multiple trees. Performance evaluation results show that p개posed architecture requires 301.7KByte SRAM to store about 40,000 prefix samples, and an address lookup is achieved by 11.3 memory accesses in average.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.5
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• pp.345-353
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• 2003

When designing network processors or implementing network equipments such as routers are implemented, IP lookup operations cause the major impact on their performance. As the organization of the IP address becomes simpler, the speed of the IP lookup operations can go faster. However, since the efficient management of IP address is inevitable due to the increasing number of network users, the address organization should become more complex. Therefore, for both IPv4(IP version 4) and IPv6(IP version 6), it is the essential fact that IP lookup operations are difficult and tedious. Lots of researcher for improving the performance of IP lookups have been presented, but the good solution has not been came out. Software approach alleviates the memory usage, but at the same time it si slow in terms of searching speed when performing an IP lookup. Hardware approach, on the other hand, is fast, however, it has disadvantages of producing hardware overheads and high memory usage. In this paper, conventional researches on IP lookups are shown and their advantages and disadvantages are explained. In addition, by mixing two representative structures, a new hybrid parallel architecture for fast IP lookups is proposed. The performance evaluation result shows that the proposed architecture provides better performance and lesser memory usage.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.2B
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• pp.158-166
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• 2004

Address lookup is one of the most essential functions of the Internet routers and a very important feature in evaluating router performance. Due to the facts that the Internet traffic keeps growing and the number of routing table entries is continuously growing, efficient address-lookup mechanism is indispensable. In recent years, various fast address-lookup schemes have been proposed, but most of those schemes are not practical in terms of the memory size required for routing table and the complexity required in table update In this paper, we have proposed a parallel IP address lookup architecture based on multiple hashing. The proposed scheme has advantages in required memory size, the number of memory accesses, and table update. We have evaluated the performance of the proposed scheme through simulation using data from MAE-WEST router. The simulation result shows that the proposed scheme requires a single memory access for the address lookup of each route when 203kbytes of memory and a few-hundred-entry TCAM are used.

• Journal of the Korean Institute of Intelligent Systems
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• v.15 no.5
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• pp.567-572
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• 2005

Recently, owing to miniaturization of computer and popularization of internet, ubiquitous computing is attracting considerable attention. In ubiquitous environment, user can receive desired information service anywhere, any time. With the advent of ubiquitous age through popularization of internet, it becomes important how to provide user with ubiquitous environment, and what and how to provide to user. In this paper, method to automatically select device most suitable for user in ubiquitous environment is offered. search agents search peripherals, make a list by function, and transmit to serve. Serve learn the transmitted information through intelligent system. If user input information in the form of linguistic according to the list, serve select device suitable for work environment, and compose the system through IP address. This was realize through practical example, experimented and confirmed.