• Title/Summary/Keyword: INPUT IMPEDANCE

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Design of the Electromagnetic Coupling Wideband Microstrip Antenna using FDTD Method (FDTD 법을 이용한 광대역 전자기 결합 마이크로스트립 안테나의 설계)

  • Jang, Yong-Woong;Shin, Ho-Sub;Kim, Nam;Park, Ik-Mo;Shin, Chull-Chai
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.9 no.4
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    • pp.473-482
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    • 1998
  • In this paper, characteristics of the wide band microstrip antennas with parasistic element are analyzed by the Finite Difference Time Domain(FDTD) method, and antenna parameters are optimized to get maximum bandwidth, retern loss, input impedance, and radiation pattern are calculated by Founier transforming the time domain results. The characteristics of the antenna are varied and the bandwidth of the antenna is broaded as a length and a width of the driven element, a gap of the driven element and the parasitic element, a width and a length of parasitic element. So the different patchs are resonating at different frequencies and this multipule resonance increase the bandwidth. The Results of the calculation and measurement, the size of the antenna with parasitic element is about a twice larger than a microstrip antenna, but bandwidth is four times better than a microstrip antenna. And these results were in relatively good accordance with the measured values.

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Linear Tapered Slot Rectifying Antenna for Portable UHF-Band RFID System (휴대용 UHF대역 RFID 시스템을 위한 선형 테이퍼드 슬롯 정류 안테나)

  • Pyo, Seongmin
    • Journal of IKEEE
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    • v.24 no.1
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    • pp.368-371
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    • 2020
  • In this paper, we propose a linear tapered slot rectifying antenna for a portable UHF-band RFID system. Since the proposed rectifying antenna does not use a dielectric substrate, the planar antenna is implemented with a thin metal thickness. The rectifier circuit converts input RF power into output DC voltage using a voltage doubler circuit based on two anti-parallel schottky diodes. The rectifying antenna is integrated by the voltage doubler circuit into a linear tapered slot antenna. For conjugate impedance matching of the rectifying circuit and the linear tapered slot antenna, the source-pull method was utilized by adjusting the angle of the tapered slot and the length of the antenna feed line. The proposed antenna prototype has been verified with the electrical and radiation characteristics through RF-DC conversion and far-field radiation test in open space measurement environment. Finally, the proposed antenna is realized to 0.23-wavelength (75 mm) and 0.18-wavelength (60 mm) at 915 MHz center frequency.

Cost Effective Silica-Based 100 G DP-QPSK Coherent Receiver

  • Lee, Seo-Young;Han, Young-Tak;Kim, Jong-Hoi;Joung, Hyun-Do;Choe, Joong-Seon;Youn, Chun-Ju;Ko, Young-Ho;Kwon, Yong-Hwan
    • ETRI Journal
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    • v.38 no.5
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    • pp.981-987
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    • 2016
  • We present a cost-effective dual polarization quadrature phase-shift coherent receiver module using a silica planar lightwave circuit (PLC) hybrid assembly. Two polarization beam splitters and two $90^{\circ}$ optical hybrids are monolithically integrated in one silica PLC chip with an index contrast of $2%-{\Delta}$. Two four-channel spot-size converter integrated waveguide-photodetector (PD) arrays are bonded on PD carriers for transverse-electric/transverse-magnetic polarization, and butt-coupled to a polished facet of the PLC using a simple chip-to-chip bonding method. Instead of a ceramic sub-mount, a low-cost printed circuit board is applied in the module. A stepped CuW block is used to dissipate the heat generated from trans-impedance amplifiers and to vertically align RF transmission lines. The fabricated coherent receiver shows a 3-dB bandwidth of 26 GHz and a common mode rejection ratio of 16 dB at 22 GHz for a local oscillator optical input. A bit error rate of $8.3{\times}10^{-11}$ is achieved at a 112-Gbps back-to-back transmission with off-line digital signal processing.

Low-Power and High-Efficiency Class-D Audio Amplifier Using Composite Interpolation Filter for Digital Modulators

  • Kang, Minchul;Kim, Hyungchul;Gu, Jehyeon;Lim, Wonseob;Ham, Junghyun;Jung, Hearyun;Yang, Youngoo
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.14 no.1
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    • pp.109-116
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    • 2014
  • This paper presents a high-efficiency digital class-D audio amplifier using a composite interpolation filter for portable audio devices. The proposed audio amplifier is composed of an interpolation filter, a delta-sigma modulator, and a class-D output stage. To reduce power consumption, the designed interpolation filter has an optimized composite structure that uses a direct-form symmetric and Lagrange FIR filters. Compared to the filters with homogeneous structures, the hardware cost and complexity are reduced by about half by the optimization. The coefficients of the digital delta-sigma modulator are also optimized for low power consumption. The class-D output stage has gate driver circuits to reduce shoot-through current. The implemented class-D audio amplifier exhibited a high efficiency of 87.8 % with an output power of 57 mW at a load impedance of $16{\Omega}$ and a power supply voltage of 1.8 V. An outstanding signal-to-noise ratio of 90 dB and a total harmonic distortion plus noise of 0.03 % are achieved for a single-tone input signal with a frequency of 1 kHz.

A $2.1{\sim}2.5\;GHz$ variable gain LNA with a shunt feed-back (병렬 피드백을 사용하여 $2.1{\sim}2.5\;GHz$ 대역에서 이득 제어가 가능한 저잡음 증폭기의 설계)

  • Hwang, Yong-Seok;Yoo, Hyung-Joun
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.44 no.7 s.361
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    • pp.54-61
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    • 2007
  • A variable gain low noise amplifier (VG-LNA) implemented in TSMC 0.18 um process is presented. This VG-LNA is designed of two stage amplifier, and its gain is controlled by the shunt feedback loop composed of a gain control transistor (GCT) and a coupling capacitor in second stage. The channel resistance of GCT in the shunt feedback loop influences the input and output stages of a second stage by the Miller effect. Total gain of the proposed VG-LNA is changed by two factors, the load impedance reduction and the interstage mismatch by controlling the channel resistance of the GCT. Consequently, by adding a shunt feedback with a gain control transistor, this proposed VG-LNA achieves both wide gain tuning range of 37 dB and continuous gain control simultaneously.

Design of S-band Turnstile Antenna Using the Parasitic Monopole (기생 모노폴을 이용한 S-band Turnstile 안테나 설계)

  • Lee, Jung-Su;Oh, Chi-Wook;Seo, Gyu-Jae;Oh, Seung-Han
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.17 no.11 s.114
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    • pp.1082-1088
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    • 2006
  • A turnstile antenna using the parasitic monopole has been developed for STSAT-2 TT&C application. The antenna consists of two radiating elements; a bow-tie dipole and a parasitic monopole. The bow-tie dipole is main radiating element, used a bow-tie structure for bandwidth improvement and size reduction. The parasitic monopole improved beamwidth and axial ratio. The input impedance of the antenna is about 50 ohm without a matching circuit. The proposed antenna has beamwidth of $>140^{\circ}$, axial ratio of < 3 dB and VSWR of < 1.5 in the band of $2.075{\sim}2.282GHz$.

Resonant Mode Analysis of Microwave Film Bulk Acoustic Wave Resonator using 3D Finite Element Method (3차원 유한 요소법을 이용한 초고주파 압전 박막 공진기의 공진 모드해석)

  • 정재호;송영민;이용현;이정희;고광식;최현철
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.12 no.1
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    • pp.18-26
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    • 2001
  • In this paper, the resonant characteristics and modes of the film bulk acoustic wave resonator (FBAR) used in 1~2 GHz frequency region are analyzed by it's input impedance which was calculated by three dimensional finite element method formulated as eigenvalue problem using electro-mechanical wave equation and boundary condition. It was extracted that the resonant and the spurious characteristics considering the effects of electrode area and shape variation and unsymmetry of upper and lower electrode. Those effects couldn't be analyzed by on dimensional analysis, e.g. Mason equivalent model. The simulation result was confirmed by comparing with the simulation data from Mason model analysis and the measured data of the ZnO FBAR fabricated using micro-machining technique. Also, through the simulation of the area variations of FBAR, it was obtained that the optimum ratio of length and thickness is 20:1 and the minimum ratio is 5:1 to operate thickness vibration mode.

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Characteristics of Stacked Probe-Fed Sqare-Ring Microstrip Antenna (적층구조, 프로브 급전방식, 정사각형 링형태 마이크로스트립 안테나 특성에 관한 연구)

  • 이정연;이중근;김성철
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.12 no.1
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    • pp.143-152
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    • 2001
  • A method for miniaturization of microstrip patch antenna without degrading its radiation characteristics is investigated in this paper. It involves perforating the patch to form a microstrip square-ring antenna, and it's BW enhancement is investigated numerically and experimentally. A ring geometry introduces additional parameters to the antenna, and those are used to control impedances, resonance frequencies, and bandwidths. For a single square ring antenna, an increase of the size of perforation increases its input impedance, decreases the resonance frequency, and bandwidths. But it affects little on directivity of the antenna. To match the antenna to a transmission line and also enhance its bandwidth, the ring is stacked by a square patch or another square ring. Also numerically simulated results by the IE3D, and experimental data are compared for proof.

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Design of a 24 GHz Power Amplifier Using 65-nm CMOS Technology (65-nm CMOS 공정을 이용한 24 GHz 전력증폭기 설계)

  • Seo, Dong-In;Kim, Jun-Seong;Cui, Chenglin;Kim, Byung-Sung
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.27 no.10
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    • pp.941-944
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    • 2016
  • This paper proposes 24 GHz power amplifier for automotive collision avoidance and surveillance short range radar using Samsung 65-nm CMOS process. The proposed circuit has a 2-stage differential power amplifier which includes common source structure and transformer for single to differential conversion, impedance matching, and power combining. The measurement results show 15.5 dB maximum voltage gain and 3.6 GHz 3 dB bandwidth. The measured maximum output power is 13.1 dBm, input $P1_{dB}$ is -4.72 dBm, output $P1_{dB}$ is 9.78 dBm, and maximum power efficiency is 17.7 %. The power amplifier consumes 74 mW DC power from 1.2 V supply voltage.

Design of Lowpass Filter With the Wide Stopband Characteristics Using Microstrip Line (마이크로스트립 선로를 이용한 광대역 차단특성을 가지는 저역통과 필터 설계)

  • Choi Dong-Muk;Shim Joon-Hwan;Jeon Joongn-Sung;Kim Dong-Il
    • Journal of Navigation and Port Research
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    • v.30 no.5 s.111
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    • pp.331-334
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    • 2006
  • In this paper, we designed and fabricated the lowpass filter with the wide stopband characteristics using microp- strip line. Adding the $\lambda_g/4$ open stub at the input and output ports, we developed the L-C ladder type lowpass filter using the open stub which has wide stopband characteristics. In order to reduce the entire size qf this filter, the high impedance microstrip lines were made with the meander structure. The lowpass filter was fabricated with the cutoff frequency 2.3 GHz and its measured frequency responses agree well with the simulation results.