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Electronics and Telecommunications Research Institute (한국전자통신연구원)
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Cost Effective Silica-Based 100 G DP-QPSK Coherent Receiver

  • Lee, Seo-Young (ICT Materials & Components Research Laboratory, ETRI) ;
  • Han, Young-Tak (ICT Materials & Components Research Laboratory, ETRI) ;
  • Kim, Jong-Hoi (ICT Materials & Components Research Laboratory, ETRI) ;
  • Joung, Hyun-Do (ICT Materials & Components Research Laboratory, ETRI) ;
  • Choe, Joong-Seon (ICT Materials & Components Research Laboratory, ETRI) ;
  • Youn, Chun-Ju (ICT Materials & Components Research Laboratory, ETRI) ;
  • Ko, Young-Ho (ICT Materials & Components Research Laboratory, ETRI) ;
  • Kwon, Yong-Hwan (ICT Materials & Components Research Laboratory, ETRI)
  • Received : 2015.07.20
  • Accepted : 2016.07.04
  • Published : 2016.10.01
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Abstract

We present a cost-effective dual polarization quadrature phase-shift coherent receiver module using a silica planar lightwave circuit (PLC) hybrid assembly. Two polarization beam splitters and two $90^{\circ}$ optical hybrids are monolithically integrated in one silica PLC chip with an index contrast of $2%-{\Delta}$. Two four-channel spot-size converter integrated waveguide-photodetector (PD) arrays are bonded on PD carriers for transverse-electric/transverse-magnetic polarization, and butt-coupled to a polished facet of the PLC using a simple chip-to-chip bonding method. Instead of a ceramic sub-mount, a low-cost printed circuit board is applied in the module. A stepped CuW block is used to dissipate the heat generated from trans-impedance amplifiers and to vertically align RF transmission lines. The fabricated coherent receiver shows a 3-dB bandwidth of 26 GHz and a common mode rejection ratio of 16 dB at 22 GHz for a local oscillator optical input. A bit error rate of $8.3{\times}10^{-11}$ is achieved at a 112-Gbps back-to-back transmission with off-line digital signal processing.

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References

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