• Title/Summary/Keyword: INPUT IMPEDANCE

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Dual-band Open Loop Antenna using Strip-conductor for the RFID and Wireless LAN Application (RFID 및 무선 LAN용 이중대역 도체스트립 개방루프 안테나)

  • Lim, Jung-Hyun;Kang, Bong-Soo;Kim, Heung-Soo;Jwa, Jeong-Woo;Yang, Doo-Yeong
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.44 no.3 s.357
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    • pp.98-104
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    • 2007
  • In this paper, the dual-band open loop antenna using a strip conductor for the RFID reader and Wireless LAN Application, which has a resonant frequency at 910MHz and 2.45 GHz, is proposed. Input impedance of antenna is matched with the feed line of 50 ohm by varying the length and width of sip conductor making up the antenna. The gain and directivity of antenna is enhanced as tuning the length of strip, and as also grooving the teeth shapes on the strip conductor. The size of fabricated antenna is $75mm\times100mm$. The return loss and the gain of fabricated antenna are -11.92 dB, 3.02 dBi at 910 MHz and -21.31 dB, 4.08 dBi at 2.45 GHz, respectively.

Wide Bandwidth PIFA Design Using Reactive Element (리액티브 소자를 이용한 광대역 PIFA 설계)

  • Jo, Ha-Seok;Moon, Sung-Jin;Park, Kyong-Nam;Lee, Jae-Seok;Kim, Hyeong-Dong
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.25 no.4
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    • pp.387-392
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    • 2014
  • In this paper, the broadband antenna design, which can be applied to USB Dongle, supporting Wibro(2.3~2.4 GHz), Wi-Fi(2.4~2.5 GHz) and LTE7(2.5~2.7 GHz) is proposed technique. The proposed antenna was designed similar to PIFA type antennas. Reactive elements were used to control the input impedance and wideband characteristics were achieved by controlling coupling between the feed structure and the radiator. As a result, the antenna printed on FR-4 PCB(${\epsilon}_r$ =4.4, tan ${\delta}$=0.02) occupying an area of $15{\times}5mm^2$ was able to achieve bandwidth of 1 GHz from 2.1 to 3.1 GHz under VSWR=2. Measured return loss characteristics, bandwidth and radiation patterns were in good agreement with the simulated results.

Design of Dual Band Antenna for Broadband Wireless LAN (광대역 무선랜용 이중대역 안테나 설계)

  • Kim, Kab-Ki
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.17 no.4
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    • pp.181-185
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    • 2017
  • In this paper, for Broadband Wireles LAN dual-band antenna was designed to satisfy the bandwidth of 2.32GHz and 5.79GHz. the substrate of proposed microstrip antenna is FR-4(er=4.3) and $34mm{\times}50mm{\times}1.5mm$ size and thickness t=0.035mm, and the simulation was used for CST Microwave Studio 2014. input return loss compared -10dB less than operates at and when gain 2.32GHz -19.321dB, 5.79GHz showed the results of -13.033dB. It increased impedance matching, minimized interference between adjacent frequencies, simplified small manufacturing methods, and demonstrated the characteristics of non-directional properties. Thus the proposed antenna satisfied the -10 dB impedancebandwidth requirement while simultaneously covering the Broadband Wireless LAN.

Study of Miniaturization of 2 Stages 2-Arm Sinuous Antenna (2단 2-암 시누어스 안테나의 소형화에 관한 연구)

  • Yoon, Sung-Hyun
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.42 no.2
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    • pp.374-382
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    • 2017
  • This paper proposed a 2 stages 2-arm sinuous antenna that operates in frequency range 0.8-6GHz. The proposed antenna's total radius is 60mm, in which 1st stage's radius is 50mm which is designed as self-complementary structure(cell's angle width $90^{\circ}$) with 8 cell, and 2nd stage is composed of non-self-complementary structure with 0.5 cell of cell's angle width $720^{\circ}$ in the radius width 10mm. Measurement's result shows that -10dB return loss starts at 0.807GHz, but 1 stage 2-arm sinuous antenna that use the same radius starts at about 0.878GHz, so proposed the possibility of the miniaturization of the sinuous antenna.

A Selective Feedback LNA Using Notch Filter in $0.18{\mu}m$ CMOS (노치필터를 이용한 CMOS Selective 피드백 저잡음 증폭기)

  • Seo, Mi-Kyung;Yun, Ji-Sook;Han, Jung-Won;Tak, Ji-Young;Kim, Hye-Won;Park, Sung-Min
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.11
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    • pp.77-83
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    • 2009
  • In this paper, a selective feedback low-noise amplifier (LNA) has been realized in a $0.18{\mu}m$ CMOS technology to cover a number of wireless multi-standards. By exploiting notch filter, the SF-LNA demonstrates the measured results of the power gain (S21) of 11.5~13dB and the broadband input/output impedance matching of less than -10dB within the frequency bands of 820~960MHz and 1.5~2.5GHz, respectively. The chip dissipates 15mW from a single 1.8V supply, and occupies the area of $1.17\times1.0mm^2$.

New Programmable RF DFT Circuit for Low Noise Amplifiers (LNA를 위한 새로운 프로그램 가능 고주파 검사용 설계회로)

  • Ryu, Jee-Youl;Noh, Seok-Ho
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.44 no.4
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    • pp.28-39
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    • 2007
  • This paper presents a programmable RF DFT (Radio Frequency Design-for-Testability) circuit for low noise amplifiers. We have developed a new on-chip RF DFT circuit that measures RF parameters of low noise amplifier (LNA) using only DC measurements [1, 2]. This circuit is extremely useful for today's RFIC devices in a complete RF transceiver environment. The DFT circuit contains test amplifier with programmable capacitor banks and RF peak detectors. The test circuit utilizes output DC voltage measurements and these measured values are translated into the LNA specifications such as input impedance and gain using the mathematical equations. Our on-chip DFT circuit can be self programmed for 1.8GHz, 2.4GHz and 5.25GHz low noise amplifiers for GSM, Bluetooth and IEEE802.11g standards. The circuit is simple and inexpensive.

The Design of Low Noise Amplifier for Overall IMT-2000 Band Repeater (IMT-2000 중계기용 전대역 저잡음 증폭기 설계)

  • 유영길
    • Journal of the Institute of Electronics Engineers of Korea TE
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    • v.39 no.4
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    • pp.409-412
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    • 2002
  • The LNA(Low Noise Amplifier) is designed for use in low cost commercial application covered fully IMT-2000 band(1920~2170MHz, BW=250MHz). It is optimized source inductance for source lead and designed to equivalent etched line. The LNA uses a high pass impedance matching network for noise match and simple structure. The bias circuit designs have been made self-biased with a negative voltage applied to gate. The power supply voltage is 8V, total current is 180mA. The LNA is biased at a Vgs of -0.4, Vds of 4V for first stage and Vds of 5V for second stage. The LNA is designed competitively for commercial product specification. The measured gain and noise figure of the completed amplifier was 20dB and 1dB, respectively. Also, input VSWR, P1dB and gain flatness was measured of 1.14 ~ l.3dB, 22.4dBm and $\pm$0.45dB, respectively. The designed LNA can be used for commercial product.

Systematic Approach for Design of Broadband, High Efficiency, High Power RF Amplifiers

  • Mohadeskasaei, Seyed Alireza;An, Jianwei;Chen, Yueyun;Li, Zhi;Abdullahi, Sani Umar;Sun, Tie
    • ETRI Journal
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    • v.39 no.1
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    • pp.51-61
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    • 2017
  • This paper demonstrates a systematic approach for the design of broadband, high efficiency, high power, Class-AB RF amplifiers with high gain flatness. It is usually difficult to simultaneously achieve a high gain flatness and high efficiency in a broadband RF power amplifier, especially in a high power design. As a result, the use of a computer-aided simulation is most often the best way to achieve these goals; however, an appropriate initial value and a systematic approach are necessary for the simulation results to rapidly converge. These objectives can be accomplished with a minimum of trial and error through the following techniques. First, signal gain variations are reduced over a wide bandwidth using a proper pre-matching network. Then, the source and load impedances are satisfactorily obtained from small-signal and load-pull simulations, respectively. Finally, two high-order Chebyshev low-pass filters are employed to provide optimum input and output impedance matching networks over a bandwidth of 100 MHz-500 MHz. By using an EM simulation for the substrate, the simulation results were observed to be in close agreement with the measured results.

On the Design of High Order Transformer Circuit Using the Genetic Algorithm and Its Application to the Wheeler Cap Measurement (유전자 알고리즘을 사용한 안테나 고차 변압 회로 구성과 변압 회로를 사용한 Wheeler Cap 효율 측정법)

  • Cho Chi-Hyun;Choo Ho-Sung;Park Ik-Mo;Kang Jin-Seob
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.17 no.8 s.111
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    • pp.753-759
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    • 2006
  • Generally, the Wheeler cap method is used to measure the efficiency of small antennas. This method often gives an unreliable efficiency when the antenna has a complicated operating principle. However, if the high-order circuit model which more closely represents the input impedance of the antenna is used in Wheeler cap method, then more accurate efficiency can be achieved. In this paper, we propose a novel method that can build the high-order circuit model using transformer circuits with the genetic algorithm(GA). To efficiently reduce the searching space in the GA and improve the convergence of the GA process, we suggest a novel scheme that finds appropriate initial values. Finally we verify the proposed method by measuring the efficiency of some passive RFID tag antennas.

Design of Absorptive Type SPST MMIC Switch for MSM of Satellite Communication (위성통신용 MSM을 위한 흡수형 SPST MMIC 스위치의 설계 및 제작)

  • Yom In-Bok;Ryu Keun-Kwan;Shin Dong-Hwan;Lee Moon-Que;Oh Il-Duck;Oh Seung-Hyeub
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.16 no.10 s.101
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    • pp.989-994
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    • 2005
  • A MMIC(Monolithic Microwave Integrated Circuit) switch chip using InGaAs/GaAs p-HEMT process has been designed for MSM(Microwave Switch Matrix) of satellite communication system. An absorptive type MMIC switch is adopted for good reflection coefficients performances of input and output ports at both on and off states. And, a quarter wavelength impedance transformer is realized with lumped elements of MIM capacitor and spiral inductor for 3 GHz band to reduce the chip size. This MMIC switch covers the frequency range of $3.2\~3.6\;GHz$. According to the on-wafer measurement, the fabricated MMIC switch with miniature size of $1.6\;mm{\times}1.3\;mm$ demonstrates insertion loss below 2 dB and isolation above 56.8 dB, and the performance coincides with simulation results.