• Journal of the Korea Institute of Information and Communication Engineering
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• v.9 no.4
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• pp.798-803
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• 2005

This paper describes a design of AES(Advanced Encryption Standard)-based CCMP core for IEEE 802.1li wireless LAN security. To maximize its performance, two AES cores ate used, one is for counter mode for data confidentiality and the other is for CBC(Cipher Block Chaining) mode for authentication and data integrity. The S-box that requires the largest hardware in AES core is implemented using composite field arithmetic, and the gate count is reduced by about $20\%$ compared with conventional LUT(Lookup Table)-based design. The CCMP core designed in Verilog-HDL has 13,360 gates, and the estimated throughput is about 168 Mbps at 54-MHz clock frequency. The functionality of the CCMP core is verified by Excalibur SoC implementation.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.43 no.6 s.312
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• pp.61-67
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• 2006

In this paper it was introduced that embedded RFID Reader /Writer system including PXA255 ARM chip which enables the Tag signal to be used by data and video processing via IEEE 802.11 communication protocol. Embedded RFID R/W middle ware was developed which transmit the searched result in the data base using the received Tag signal via IEEE 802.11 communication protocol. Developed embedded RFID R/W system was composed of three parts - PXA255 ARM chid (Core Part) 13.56 MHz RFID Reader /Writer, wireless LAN for data communication with server and TFT-LCD terminal. Once this system receives the Tag signal through the serial port, it transmits the data through the wireless LAN to the server and it displays the received image data which was processed by the server onto the TFT-LCD screen. Embedded RFID R/W Middle ware transmits the received Tag signal from RFID R/W to the embedded system, which activates the socket program to connect to the window server via IEEE 802.11 communication protocol and transmits the Tag signal. Window server program searches the Database using this Tag information and displays the result on to the TFT-LCD window in the embedded system via IEEE 802.11 protocol.

• Journal of IKEEE
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• v.17 no.2
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• pp.96-103
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• 2013

Since multimedia data takes large part of realtime transmission in wireless communication environments such as IEEE 802.11, QoS issues became one of the important problems with network performance. 802.11e MAC provides differentiated services based on priority schemes to solve existing 802.11 MAC problems. The TXOP is an important factor with the priority to improve network performance and QoS because it defines the time duration in which multiple frames can be transferred at one time for each station. In this paper, therefore frame sizes, TXOP Limit, and Priority values in accordance with the number of stations are experimented and derived for best network performance and QoS. Using 802.11e standard parameters, simulation results show the best throughput when the number of stations is 5 and TXOP Limit value is 6.016ms. For fairness, the best result is achieved at 3.008ms of TXOP Limit value and 15-31 of CW(Contention Window) that is lower priority than CW 7-15.

• Proceedings of the IEEK Conference
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• 2000.11b
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• pp.184-187
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• 2000

A network is an important portion of communications in these days. Because of many inconveniences of a wired-network, wireless solutions have been studied for many years. One of the results of those efforts is IEEE 802.11, wireless LAN. This paper briefly summarizes wireless LAN and specially focuses on the design of a network processor for the wireless LAN system. The processor has 16-bit instruction set suitably selected for network processing and low-power consumption. It is implemented and verified with a wireless LAN system model. The wireless LAN system is modeled in RTL excluding the RF module. The processor can be used in many wireless systems as a controller and utilized as a test module for the research of low-power schemes.

• Proceedings of the IEEK Conference
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• 2002.06a
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• pp.5-8
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• 2002

In this paper, we are designed and verified a FFT/IFFT processor that is possible from the wireless LAN environment which is adopted international standard of the IEEE802.11a. The proposed architecture of the FFT/IFFT has Radix-2 64point SDF(single-path delay feedback) Pipeline technique and DIF(Decimation in Frequenct) structure. The FFT/IFFT processor has each 8 bit complex input-output and 6 bit Twiddle factor. we used Max-PlusII for simulation and can see that processor is properly operated

• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.12A
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• pp.1303-1310
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• 2007

In IEEE 802.11b wireless network, stations synchronize themselves to the beacons periodically sent by the access point (AP) when they are running in low power mode. Stations stay awake for enough time to receive beacon because it is delayed in AP if the wireless channel has been being used by other traffic at each scheduled instant. In this paper, we propose a method that measures the delay of received beacons and calculates wake-up interval of station to receive the next one. Beacon transmission delay at the AP is analyzed. The proposed method is simulated and its characteristics are described in the analysis. The result measured in terms of station's wake-up interval shows some enhancement in energy consumption.

• Journal of Digital Contents Society
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• v.10 no.2
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• pp.357-365
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• 2009

To effectively exploit the underlying network bandwidth while maximizing user perceivable QoS, mandatory to make proper estimation on packet loss and queuing delay of the underling network. This issue is further emphasized in wireless network environment where network bandwidth is scarce resource. In this work, we focus our effort on developing performance model for wireless network. We collect packet trace from actually wireless network environment. We find that packet count process and bandwidth process in wireless environment exhibits long range property. We extract key performance parameters of the underlying network traffic. We develop an analytical model for buffer overflow probability and waiting time. We obtain the tail probability of the queueing system using Fractional Brown Motion (FBM). We represent average queuing delay from queue length model. Through our study based upon empirical data, it is found that our performance model well represent the physical characteristics of the IEEE 802.11b network traffic.

• Information and Communications Magazine
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• v.32 no.3
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• pp.69-76
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• 2015

무선랜(Wireless LAN)으로도 불리는 Wi-Fi 기술은 1997년 IEEE 802.11 전송 규격(Legacy Standard)이 출간된 이후 지속적인 보완과 개정 작업을 통해 그 규격이 발전되어 가며 스마트폰, Tablet, Note-PC 등 개인 휴대 단말 기기를 위한 데이터 네트워크의 필수적인 구성 요소가 되었다. IEEE 표준과 별도로 표준 인증기관인 Wi-Fi Alliance를 통하여 제품 간 무선연결 호환성의 확보 뿐 아니라 Wi-Fi 기반 서비스 규격 제정에 이르기까지 Wi-Fi 표준 작업이 수행되고 있다. 본고에서는 나날이 발전해 온 Wi-Fi 기술 표준을 전송 속도 향상 측면과 주파수 대역 확장 측면에서 살펴보고, 차세대 Wi-Fi 기술인 IEEE 802.11ax, 즉 HEW(High Efficiency WLAN) 표준에 대하여 살펴보도록 한다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.2B
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• pp.98-106
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• 2006

In order to provide a realtime transmission over a wireless LAM, we here present a new jamming based retransmission mechanism. In a legacy wireless LAN system, all stations use the binary exponential backoff algorithm to avoid collisions among frames. It is well known that the backoff algorithm causes more collisions as the numbers of active stations increases. This makes transmission of real time traffic hard. In the proposed scheme, when each station senses collisions, it promptly allows to send a jamming signal during a unique jamming window period which is determined by its own channel access count database(CACDB). This jamming windows is chosen not to be overlapped each other by using of CACDB, and thus channel access of another station is prevented. Hereafter the station gets the ownership of the medium when the wireless medium becomes idle after sending the jamming signal and sensing carrier, and then sends frame in medium. In our proposal, repeating collisions is never happened. We here assume that real time traffic use a frame of fixed length in order to make the time for receiving its ACK frame same. Comparing the proposed jamming-based retransmission scheme with the the 802.11 and 802.11e MAC by simulation. one can find that the proposed scheme have advantages in terms of delay, average backoff time, and average number of collisions per frame. One can find that the proposed scheme might be practically applicable to several applications of realtime traffic transmission in wireless LAN systems.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2010.05a
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• pp.798-801
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• 2010

This paper describes an efficient architecture for LDPC(Low-Density Parity Check) decoder, which supports three block lengths (648, 1,296, 1,944) of IEEE 802.11n standard. To minimize hardware complexity, the min-sum algorithm and block-serial layered structure are adopted in DFU(Decoding Function Unit) which is a main functional block in LDPC decoder. The optimized H-ROM structure for multi block lengths reduces the ROM size by 42% as compared to the conventional method. Also, pipelined memory read/write scheme for inter-layer DFU operations is proposed for an optimized operation of LDPC decoder.