• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.18 no.4
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• pp.309-312
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• 2005

The RFID tag IC has been presently abstracting great attention in the world because it can be one of the important sensor elements in the ubiquitous sense network in the future. The 125 kHz and 13.56 MHz RFID tag IC's have already been developed and now widely used in the world and the UHF band tag IC is under development. Domestically, the development of the 125 kHz tag IC was reported before, but there has been no report about the development of the 13.56 MHz tag IC up to now. In this paper, the results of the design, fabrication and measurement of a 13.56 MHz tag IC are discussed. The digital and the analog circuits for the chip were designed and the chip was fabricated using 0.35 ㎛ standard CMOS technology and measured with a separately prepared reader. It was found from the measurement results that it operated properly within 8 cm range of the reader.

• Progress in Superconductivity and Cryogenics
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• v.1 no.2
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• pp.15-19
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• 1999

For large scale applications of high temperature superconductor (HTS) such as transmission cables, motors and generators, long length of flexible HTS conductor is required. Currently, Bi-2223 HTS tape is capable of being fabricated in longer than 100 m length by industrial processes. In this study, we fabricated 100 m 19 filamentary Bi-2223 ($Bi_{1.8}Pb_{0.4}Sr_2Ca_2O_{10+x}$) HTS tape by PIT (Power in Tube) process. Critical current(IC) of this long length tape was measured 18.5 A at 77K, self field. Critical current of 100 m length tape was mainly resulted from the increase of inhomogeneity in oxide from the increase of inhomogeneity in oxide layer. Engineering critical current (Je=Ic/total tape cross-section area) that is important factor for practical applications and fabrication cost was measured 2.2 kA/cm2.

• Proceedings of the Korean Society For Composite Materials Conference
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• 2003.10a
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• pp.3-6
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• 2003

In this work, poly(ethylene oxide) nanofibers were fabricated by electrospinning to prepare nanofibers-reinforced composites. And the PEO powders-impregnated composites were also prepared to compare with physicochemical properties of nanofibers-reinforced composites. Morphology and fiber diameter of PEO nanofibers were determined by SEM observation. Mechanical interfacial properties of the composites were investigated in fracture toughness tests and interlaminar shear strength (ILSS) test. As a result, the fiber diameter decreased in increasing applied voltage. However the optimum condition for the fiber formation was 15 ㎸, resulting from increasing of jet instability at high voltage and the prepared PEO nanofibers were useful in fiber reinforced composites. The PEO-based nanofibers-reinforced composites showed an improvement of fracture toughness factors ($K_{IC} and G_{ IC}$) and ILSS, compared to the composites impregnated with PEO powders. These results were noted that the nanofibers had higher specific surface area and larger aspect ratio than those of the powder, which played an important role in improving the mechanical interfacial properties of the composites.

• Journal of Sensor Science and Technology
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• v.21 no.1
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• pp.34-38
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• 2012

We have developed a cost effective test socket for ball grid array(BGA) integrated circuit(IC) packages using BeCu metal sheet as a test probe. The BeCu furnishes the best combination of electrical conductivity and corrosion resistance. The probe of the test socket was designed with a BeCu cantilever. The cantilever was designed with a length of 450 ${\mu}m$, a width of 200 ${\mu}m$, a thickness of 10 ${\mu}m$, and a pitch of 650 ${\mu}m$ for $11{\times}11$ BGA. The fabrication of the test socket used techniques such as through-silicon-via filling, bonding silicon wafer and BeCu metal sheet with dry film resist(DFR). The test socket is applicable for BGA IC chip.

• Journal of the Korean Institute of Telematics and Electronics
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• v.23 no.6
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• pp.923-928
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• 1986

This paper describes the design and fabrication of a high performance digital tuning analog component integrated circuit that contains a television station detector and decoders(H and L types). When the comparator level sampling method is used, this integrated circuit can be used as a stable channel selector for an external circuit with very large signal variation. It has been fabricated using the SST bipolar standard process and its chip size is 2.2x2.1mm\ulcorner As a result, we have succeeded in fabricating the IC that satisfies the D.C characteristics, and the channel station detector and decoder function.

• Transactions on Electrical and Electronic Materials
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• v.14 no.6
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• pp.304-307
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• 2013

Reverse engineering of semiconductor devices utilizes delayering processes, in order to identify how the interconnection lines are stacked over transistor gates. Cu metal has been used in recent fabrication technologies, and de-processes becomes more difficult with the shrinking device dimensions. In this article, reverse engineering technologies to reveal the Cu interconnection lines and Cu via-plugs embedded in dielectric layers are investigated. Stacked dielectric layers are removed by $CF_4$ plasma etching, then the exposed planar Cu metal lines and via-plugs are selectively delineated by wet chemical solution, instead of the commonly used plasma-based dry etch. As a result, we have been successful in extracting the layouts of multiple layers within a system IC, and this technique can be applicable to other logic IC, analog IC, and CMOS IC, etc.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.12 no.3
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• pp.292-297
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• 1987

High-speed GaAs IC Logic Gates being widely studied and developed in the develped countries were reanalysed and reexamined through SPICE simulations. And, furthermore, the detailed examinations of their characteristics such as operation characteristics and conditions, integration densities, service-ableness, and the limitation of both fabrication and application, give us a clue of the feasibility and application of them in the real integrated circuits. This paper will provide a reasonably good guide to set-up one of goals or future development of high-speed GaAs IC's being led by the goverment recently in our country.

• Journal of the Korean Institute of Telematics and Electronics
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• v.23 no.3
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• pp.384-388
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• 1986

This paper describes the design and fabrication of an integrated circuit that can detect the teletext signal included in a composite video signal. The circuit that is based on the comparatorlevel sampling method can detect a stable data signal even from an external circuit with large variation. It has been fabricated by the SST bipolar standard process. Its chip size is $2.5x3.78mm^2$.

• Journal of the Korean Institute of Telematics and Electronics
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• v.24 no.4
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• pp.618-624
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• 1987

This paper describes the design and fabrication of a signal processing integrated circuit required for the recording and playback of VTR audio signal. The integrated circuit was designed using 8\ulcorner design rule and its chip size is 2.5x2.5mm\ulcorner It was fabricated using SST bipolar standard process technology. The measurement analysis of the fabricated circuit proves the satisfactory DC characteristics and its proper audio signal processing funcstion.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.54 no.2
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• pp.88-93
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• 2005

To develop a 100 hp high temperature superconducting(HTS) motor with high efficiency first in Korea, we fabricated a HTS field winding and test. HTS field winding is composed of sixteen HTS race track shaped coils wound with stainless steel-reinforced Bi-2223 tape conductor by react and wind fabrication method. Nomex paper was used for electrical insulation. Each of four magnet pole assemblies was constructed with four double pancake sub-coils, mechanically stacked and electrically in series. Four magnet assemblies were fixed on an aluminum support structure to make effective heat transfer. The Critical current (Ic) was 41.5A at 77K and self field. However the lowest Ic value of sub-coils was 35A. Joule heat generated by each joints between sub-coils was lower than 1mW at 77K and 34A. And Joule heat generated by the joints between field coils was lower than 10mW at 77K and 34A. Joule heat of the whole field winding was 1W at 77K and 32A. And so, the lowest Ic value of sub-coils was more important than Joule heats generated by all joints. The operating current must be lower than the lowest Ic of all the sub-coils. In this paper, design, construction and testing of HTS field winding, Joule heat generated by the joints, and operating current were discussed.