• Title/Summary/Keyword: IC Method

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Circuit Partitioning Using A New Quadratic Boolean Programming Formulation for Reconfigurable Circuit Boards (재구성 가능한 회로 보드를 위한 새로운 Quadratic Boolean Programming 수식에 의한 분할)

  • Choe, Yeon-Gyeong;Im, Jong-Seok
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.37 no.2
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    • pp.65-77
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    • 2000
  • We propose a new formulation by quadratic boolean programming to partition circuits for FPGA based reconfigurable circuit boards, in which the routing topology among IC chips are predetermined. The formulation is to minimize the sum of the wire length by considering the nets passing through IC chips for the interconnections between chips which are not adjacent, in addition to the constraints considered by the previous partition methods. We also describe a heuristic method, which consist of module assignment method to efficiently solve the problem. Experimental results show that our method generates the partitions in which the given constraints are all satisfied for all the benchmark circuits tested. The pin utilization are reduced for the most of the circuits and the total wire length of the routed nets are improved up to 34.7% compared to the previous method.

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Latch-Up Prevention Method having Power-Up Sequential Switches for LCD Driver ICs (LCD 구동 IC를 위한 Power-Up 순차 스위치를 가진 Latch-Up 방지 기술)

  • Choi, Byung-Ho;Kong, Bai-Sun;Jun, Young-Hyun
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.6
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    • pp.111-118
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    • 2008
  • In this paper, novel latch-up prevention method that employs power-up sequential switches has been proposed to relieve latch-up problem in liquid crystal display (LCD) driver ICs. These sequential switches are inserted in the 2'nd and 3'rd boosting stages, and are used to short the emitter-base terminals of parasitic p-n-p-n circuit before relevant boosting stages are activated during power-up sequence. To verily the performance of the proposed method, test chips were designed and fabricated in a 0.13-um CMOS process technology. The measurement results indicated that, while the conventional LCD driver If entered latch-up mode at $50^{\circ}C$ accompanying a significant amount of excess current, the driver IC adopting the proposed method showed no latch-up phenomenon up to $100^{\circ}C$ and maintained normal current level of 0.9mA.

Fracture Resistance Characteristics of SA516-Gr.70 Steel Plate for RCS Piping Elbow and Support Skirt (원자로 냉각재배관 엘보우 및 서포트 스컷트용)

  • Son, Jong-Dong;Lim, Man-Bae
    • Journal of the Korean Society of Safety
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    • v.21 no.4 s.76
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    • pp.49-54
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    • 2006
  • The evaluation of elastic-plastic fracture characteristic was investigated in ferrite steel SA 516- Gr70 used for reactor coolant piping elbow and support skirt of pressure vessels. This paper describes the effect of temperature on J-R curve characteristic of this material. The elastic-plastic fracture mechanics parameter J is obtained with unloading compliance method. The test method were analyzed according to ASTM E 813-89 and E 1152-89. Unloading compliance $J_{IC}$ tests were performed on 1 CT specimens at varied temperatures from $25^{\circ}C$ to about $400^{\circ}C$ using a high temperature extensometer. At all temperature, valid $J_{IC}$ measurements could be made and $J_{IC}$ decreased with increasing temperature. SEM fractography schematically illustrates microvoid initiation, growth and coalescence at the tip of a preexisting crack.

The Evaluation for Elastic-Plastic Fracture Toughness in a Reactor Pressure Vessel Steel(SA508-3) (원자력 압력용기강(SA508-3)의 탄소성 파괴인성 평가)

  • 오세욱;윤한기;임만배
    • Journal of Ocean Engineering and Technology
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    • v.7 no.2
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    • pp.91-102
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    • 1993
  • The elastic-plastic fracture thoughness J sub(IC) of Nuclear Reactor Vessel Steel(SA 508-3) which has high toughness was discussed at temperatures RT, $-20^{\circ}C$, $200^{\circ}C$ and 1/2/CT specimen was used for this study. Especially the two methods recommended in ASTM and JSME were compared. It was difficult to find J sub(IC) by ASTM R-curve method with the specimen used for this research, while JSME R-curve method yielded good result. The stretched zone width menthod gave slightly larger J sub(IC) values than those by the R-curve method for SA 508-3 steel.

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Compare of buck-boost converter and Boost converter using the IC MPPT method Efficiency (IC MPPT 방법을 이용한 벅-부스트 컨버터와 부스트 컨버터의 효율분석 및 비교)

  • Kim, Yu-Tak;Ko, Jae-Sub;Seo, Tae-Young;Kang, Sung-Min;Chung, Dong-Hwa
    • Proceedings of the KIEE Conference
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    • 2015.07a
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    • pp.952-953
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    • 2015
  • In this paper, various MPPT control in the most simple and widely used method of IC using the method According to the type of DC-DC converter to analyze the efficiency buck-boost convertor, Cuk convertor using each efficiency was analyzed.

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Analyses of Stress Singularities on Bonded Interfaces in the IC Package by Using Boundary Element method (경계요소법을 이용한 반도체 패키지의 응력특이성 해석)

  • Park, Cheol-Hee;Chung, Nam-Yong
    • Transactions of the Korean Society of Machine Tool Engineers
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    • v.16 no.6
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    • pp.94-102
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    • 2007
  • Applications of bonded dissimilar materials such as large scale integration (LSI) packages, ceramics/metal and resin/metal bonded joints, are very increasing in various industry fields. It is very important to analyze the thermal stress and stress singularity at interface edge in LSI. In order to investigate stress singularities on the bonded interface edges and delamination of die pad and resin in the IC package. In this paper, stress singularity factors(${\Gamma}_i$) and stress intensity factors($K_i$) considering thermal stress in the IC package were analyzed by using the 2-dimensional elastic boundary element method(BEM).

THERMO-CON control circuit using PWM method (PWM 방식을 이용한 THERMO-CON 제어 회로)

  • 이장혁;이경탁;이상석
    • Proceedings of the IEEK Conference
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    • 2003.07c
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    • pp.2831-2834
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    • 2003
  • 본 논문에서는 PWM 방식을 이용한 THERMO-CON 제어 회로를 제안하였다. 제안한 회로는 정전압을 형성하기 위한 레귤레이터, 신호를 처리하기 위한 op-amp, 삼각파를 만들기 위한 OSC, 그리고 부하의 상태를 감지하기 위한 AMC 와 ISC 로 구성된다. 테스트 결과 서지 전압인가 시 PWM 방식으로 동작하여 회로의 P/sub D/(Power Dissipation)을 줄여 소자의 파괴를 막고 중부하 시(여러 개의 릴레이 구동 시) PWM 동작을 하여 소자의 파괴를 막는다는 것을 확인하였으며, 출력 쇼트 시 쇼트보호회로에 의해 출력 트랜지스터의 파괴를 막는다는 것을 확인하였다.

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A Study on OLED display device's line defect test methode (OLED display device의 Line Defect 시험법에 관한 연구)

  • Choi, Young-Tae;Choi, Jai-Rip
    • Proceedings of the Safety Management and Science Conference
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    • 2009.04a
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    • pp.523-529
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    • 2009
  • The ACF(Anisotropic Conductive Film) is used for bonding Drive IC and OLED display device panel. If ACF bonding process is problem, a malfunction of line defect can occur. Because electric resistance increase between the panel and drive IC after a period of time, drive IC can not supply enough current to the panel. This paper is studied on a method of test for line defect.

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Integrated Circuit(IC) Package Analysis, Modeling, and Design for Resonance Reduction (공진현상 감소를 위한 집적회로 패키지 설계 및 모델링)

  • 안덕근;어영선;심종인
    • Proceedings of the IEEK Conference
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    • 2001.06b
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    • pp.133-136
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    • 2001
  • A new package design method to reduce resonance effect due to an IC package is represented. Frequency-variant circuit model of the power/ground plane was developed to accurately reflect the resonance. The circuit model is benchmarked with a full wave simulation, thereby verifying its accuracy. Then it was shown that the proposed technique can efficiently reduce the resonance due to the IC package.

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An Application of Non-contact IC-Card for Railway (철도에 있어서의 비접촉 IC카드 이용)

  • Park, Bong-Soon;Park, Seok-Ha;Kim, Yang-Mo
    • Proceedings of the KIEE Conference
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    • 1997.07a
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    • pp.364-366
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    • 1997
  • This paper is investigated about the IC-card being expanded gradually, and will be presented the probability applying to fare collection system of railway. To become an intelligent system for railway system, it is necessary to acquire the information for the passengers by non-contact method.

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