• Elastomers and Composites
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• v.45 no.3
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• pp.188-198
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• 2010

The term 'shape memory polymers (SMPs)' describes a class of polymers which can remember the original shape and recover from deformed to its original shape by the applied stimuli, e.g., heat, electricity, magnetic field, light, etc. SMPs are classified as one of the 'smart polymers' and have great potentials as high-value-added materials. Especially, low thermal, electrical, and mechanical properties of SMPs can be improved by incorporating the various fillers. This paper aims to review the SMPs and their basic principles, and the trends of the development of SMPs nanocomposites.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.285-285
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• 2016

Resistive random access memory devices have been widely studied due to their high performance characteristics, such as high scalability, fast switching, and low power consumption. However, fluctuation in operational parameters remains a critical weakness that leads to device failures. Although the random formation and rupture of conducting filaments (CFs) in an oxide matrix during resistive switching processes have been proposed as the origin of such fluctuations, direct observations of the formation and rupture of CFs at the device scale during resistive switching processes have been limited by the lack of real-time large-area imaging methods. Here, a novel imaging method is proposed for monitoring CF formation and rupture across the whole area of a memory cell during resistive switching. A hybrid structure consisting of a resistive random access memory and a light-emitting diode enables real-time monitoring of CF configuration during various resistive switching processes including forming, semi-forming, stable/unstable set/reset switching, and repetitive set switching over 50 cycles.

• Journal of KIISE:Computer Systems and Theory
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• v.37 no.4
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• pp.215-225
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• 2010

The NAND flash memory based SSDs are considered to replace the existing HDDs. To maximize the I/O performance, SSD is composed of several NAND flash memories in parallel. However, to adopt the hybrid mapping scheme in SSD may cause degradation of the I/O performance. In this paper, we propose a new mapping scheme for the SSD called WADPM. WADPM loads only necessary mapping information into RAM and dynamically adjusts the size of mapping information in the RAM. So, WADPM avoids the shortcoming of page-level mapping scheme that requires too large mapping table. Performance evaluation using simulations shows that I/O performance of WADPM is 3.5 times better than the hybrid-mapping scheme and maximum size of mapping table of WADPM is about 50% in comparison with the page-level mapping scheme.

• Journal of Korea Multimedia Society
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• v.10 no.11
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• pp.1384-1397
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• 2007

This paper proposes fast storage techniques for hybrid query of data streams. DSMS(Data Stream Management System) have been researched for processing data streams that have busting income. To process hybrid query that retrieve both current incoming data streams and past data streams data streams have to be stored into disk. But due to fast input speed of data stream and memory and disk space limitation, the main research is not about querying to stored data streams but about querying to current incoming data streams. Proposed techniques of this paper use circular buffer for maximizing memory utility and for make non blocking insertion possible. Data in a disk is compressed to maximize the number of data in the disk. Through experiences, proposed technique show that bursting insertion is stored fast.

• Earthquakes and Structures
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• v.27 no.1
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• pp.1-15
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• 2024

In order to enhance the seismic performance of base-isolated structures on soft foundations, the hybrid system of base-isolated system (BIS) and shape memory alloy inerter (SMAI), referred to as BIS+SMAI, is for the first time here proposed. Considering the nonlinear hysteretic relationships of both the isolation layer and SMA, and soil-structure interaction (SSI), the equivalent linearized state space equation is established of the structure-BIS+SMAI system. The displacement variance based on the H₂ norm is then formulated for the structure with BIS+SMAI. Employing the particle swarm optimization, the optimization design methodology of BIS+SMAI is presented in the frequency domain. The evolvement rules of BIS+SMAI in the effectiveness, robustness, SMA driving force, inertia force, stroke, and damping enhancement effect are revealed in the frequency domain through changing the inerter-mass ratio, structural height, aspect ratio, and relative stiffness ratio between the soil and structure. Meanwhile, the validation of BIS+SMAI is conducted using real earthquake records. Results demonstrate that BIS+SMAI can effectively reduce the isolation layer displacement. The inerter can significantly increase the hysteretic displacement of SMA and thus enhance its energy dissipation capacity, implying that BIS+SMAI has better effectiveness than BIS+SMA. Although BIS+SMAI and BIS+ tuned inerter damper (TID) have practically the same effectiveness, BIS+SMAI has the lower optimum damping, significantly smaller inertia force, and higher robustness to perturbations of the optimum parameters. Therefore, BIS+SMAI can be used as a more engineering realizable hybrid system for enhancing the performance of base-isolated structures in soft soil areas.

• The Journal of the Korea institute of electronic communication sciences
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• v.6 no.5
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• pp.665-671
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• 2011

The Competitiveness of Hybrid hard disk drive(H-HDD) for solid state disk(SSD) comes from both lower power consumption and higher reading speed. This paper suggests a prefetching scheme that can improve the performance of Non-Volatile cache(NVCache) memory installed on the H-HDD through prefetching disk blocks as well as files to the NVCache. The proposed scheme makes the highly used data such as booting files copy to the NVCache as an unit of file and the frequently accessed blocks copy to the NVCache. This prefetching is done on the idle time of disk queue and the priorities of prefetched target blocks are based on both time and spatial locality of blocks. Experiments results show that the suggested method can improve response time of H-HDD and also lower the power consumption.

• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.393-395
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• 2009

We fabricated oxide and oxide/organic hybrid TFTs on a glass substrate using the photolithography process under $200^{\circ}C$. We adopt the solution processed organic ferroelectric materials of P(VDF-TrFE) and polyimide (KSPI) insulator for 1-T structure memory and flexible device, respectively. All devices have successfully operated and showed the possibility of hybrid TFTs for the application to the flexible electronic devices.

• Nuclear Engineering and Technology
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• v.54 no.10
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• pp.3864-3877
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• 2022

We propose a new approach called PESA (Prioritized replay Evolutionary and Swarm Algorithms) combining prioritized replay of reinforcement learning with hybrid evolutionary algorithms. PESA hybridizes different evolutionary and swarm algorithms such as particle swarm optimization, evolution strategies, simulated annealing, and differential evolution, with a modular approach to account for other algorithms. PESA hybridizes three algorithms by storing their solutions in a shared replay memory, then applying prioritized replay to redistribute data between the integral algorithms in frequent form based on their fitness and priority values, which significantly enhances sample diversity and algorithm exploration. Additionally, greedy replay is used implicitly to improve PESA exploitation close to the end of evolution. PESA features in balancing exploration and exploitation during search and the parallel computing result in an agnostic excellent performance over a wide range of experiments and problems presented in this work. PESA also shows very good scalability with number of processors in solving an expensive problem of optimizing nuclear fuel in nuclear power plants. PESA's competitive performance and modularity over all experiments allow it to join the family of evolutionary algorithms as a new hybrid algorithm; unleashing the power of parallel computing for expensive optimization.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.17 no.2
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• pp.1-6
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• 2017

Due to the recent advances in IoT technologies, reducing power consumption in battery-based IoT devices becomes an important issue. An IoT device is a kind of real-time systems, and processor voltage scaling is known to be effective in reducing power consumption. However, recent research has shown that power consumption in memory increases dramatically in such systems. This paper aims at combining processor voltage scaling and low-power NVRAM technologies to reduce power consumption further. Our main idea is that if a task is schedulable in a lower voltage mode of a processor, we can expect that the task will still be schedulable even on slow NVRAM memory. We incorporate the NVRAM memory allocation problem into processor voltage scaling, and evaluate the effectiveness of the combined approach.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.21 no.6
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• pp.141-145
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• 2021

Various types of memory architectures have been developed, and various compiler optimization techniques have been studied to efficiently use them. In particular, since a memory is a major component that determines performance in mobile computing devices, various optimization techniques have been developed to support them. Recently, a lot of research on hybrid type memory architecture is being conducted, so various compiler techniques are being studied to support it. Existing compiler optimization techniques can be used to achieve the required minimum performance and constraint on low power according to market requirements. References for determining the low-power effect and the degree of performance improvement using these optimization techniques are not properly provided yet. This study was conducted to provide the experimental results of the existing compiler technique as a reference for the development of multibank memory architecture.