• Journal of Advanced Marine Engineering and Technology
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• v.37 no.4
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• pp.409-417
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• 2013

Mu-communication board supported by multi-communication is designed with Atxmega 128A1 which is a low power energy consuming of 8-bit microcontroller. ATxmega128A1 microcontroller consists of 8 UART(Universal asynchronous receiver/transmitter) ports which can be setting appropriate user interface having command line interpreter(CLI) program with each port, 2 kbytes EEPROM, 128 kbytes flash memory, 8 kbytes SRAM. 8 URAT ports are used for the multi communication modem, GPS module, etc. and EEPROM is used for saving a configuration for program running, and flash memory of 128 kbytes is used for storing a Firm Ware, and 8 kbytes SRAM is used for stack, storing memory of global variables while program running. If we uses the hybrid communication of path optimization of VHF, TRS and CDMA to remote control AtoN(aid to navigation), it is able to remove the communication shadow area. Even though there is a shadow area for individual communication method, we can select an optimum communication method. The compatibility of data has been enhanced as using of same data frame per communication devices. For the test, 8640 of data has been collected from the each buoy during 30 days in every 5 minutes and the receiving rate of the data has shown more than 99.4 %.

• Proceedings of the KIPE Conference
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• 2011.07a
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• pp.226-227
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• 2011

본 논문에서는 플러그인 하이브리드 자동차(Plug-in Hybrid Electric Vehicles, PHEVs)에 모터 인덕턴스를 이용한 배터리 충전 기법을 적용하는 경우, 발생되는 손실을 PHEV의 실제 소자 파라미터를 고려하여 수식적으로 분석한다.

• Proceedings of the KIPE Conference
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• 2012.07a
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• pp.21-22
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• 2012

본 논문은 휴대용 연료전지-배터리 하이브리드 시스템에 적용 가능한 구조들을 비교 분석하고 구조 선정을 위한 가이드라인을 제시한다. 각 구조의 특징 및 장단점을 분석하고 시스템 설계 사양에 적합한 구조를 선정하는 과정을 보인 뒤, 그 타당성을 PSIM 시뮬레이션을 통해 검증한다.

• Proceedings of the Korean Institute of Communication Sciences Conference
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• 1998.06a
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• pp.1093-1096
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• 1998

• Proceedings of the Korean Institute of Communication Sciences Conference
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• 1994.06a
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• pp.468-473
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• 1994

• Proceedings of the Korean Institute of Communication Sciences Conference
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• 1988.10a
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• pp.199-202
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• 1988

• Proceedings of the Korean Institute of Communication Sciences Conference
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• 1990.10a
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• pp.215-218
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• 1990

• Proceedings of the Korean Institute of Communication Sciences Conference
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• 1991.04a
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• pp.125-128
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• 1991

• Proceedings of the Korean Institute of Communication Sciences Conference
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• 1996.06a
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• pp.889-893
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• 1996

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.1
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• pp.36-44
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• 2007

This paper presented a hybrid ternary encoding scheme using 3-valued logic. It can adapt to the delay-insensitive(DI) model. We designed an asynchronous wrapper for the hybrid ternary encoding scheme to communicate with various asynchronous encoding schemes. It reduced about 50% of transmission lines and power consumption compared with the conventional 1-of-4 and ternary encoding scheme. The proposed wrappers were designed and simulated using the $0.18-{\mu}m$ standard CMOS technology. As a result, the asynchronous wrapper operated over 2 GHz communicating with a system bus. Moreover, the power dissipation of the system bus adapted the hybrid ternary encoding logic decreases 65%, 43%, and 36% of the dual-rail, 1-of-4, and ternary encoding scheme, respectively. The proposed data encoding scheme and the wrapper circuit can be useful for asynchronous high-speed and low-power asynchronous interface.