• Proceedings of the KIEE Conference
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• 1995.07c
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• pp.1365-1367
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• 1995

The PLS 2-GeV linac employs 11 units of high-power pulsed klystrons(80MW) as the main RF sources. The matching modulators of 200 MW(400kV, 500 A) can provide a flat-top pulse width of 4.4 ${\mu}s$ with a maximum pulse repetition rate of 120 Hz at the full power level. For a good stability of electron beams, the pulse-to-pulse flat-top voltage variation of a modulator requires less than 0.5%. In order to achieve this goal, we stabilized high voltage charging power supplies within 1% by a phase controlled SCR voltage regulator. In addition, we employed ac/dc feedback together with a resistive De-Q'ing system to achieve far less than 0.5% variation of the PFN charging voltage. This paper presents the main feature of the klystron-modulator system and the characteristics of the pulsed high-power RF system performance during the beam injection operation for the Pohang Light Source commissioning.

• Journal of Korean Vacuum Science & Technology
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• v.7 no.2
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• pp.45-56
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• 2003

A high flux metal plasma pulse ion source, which can simultaneously perform ion implantation and deposition, was developed and tested to evaluate its performance using the prototype. Flux of ion source was measured to be 5 A and bi-polar pulse power supply with a peak voltage of 250 V, repetition of 20 Hz and width of 100 ${\mu}\textrm{s}$ has an output current of 2 kA and average power of 2 kW. Trigger power supply is a high voltage pulse generator producing a peak voltage of 12 kV, peak current of 50 A and repetition rate of 20 Hz. The acceleration column for providing target energy up to ion implantation is carefully designed and compatible with UHV (ultra high vacuum) application. Prototype systems including various ion sources are fabricated for the performance test in the vacuum and evaluated to be more competitive than the existing equipments through repeated deposition experiments.

• Journal of electromagnetic engineering and science
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• v.18 no.1
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• pp.20-28
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• 2018

The time synchronization of each sub-unit of a pulsed generator is important to generate an output high-power radio frequency (RF) signal. To obtain the time synchronization between an input RF signal fed by an external source and an electron beam produced by an electric pulse generator, the influence of different charging voltages on a delay and a rise time of the output pulse waveform in the electric pulse generator should be carefully considered. This paper aims to study the timing characteristics of the delay and the rise time as a function of different charging voltages with a peak value of less than -35 kV in the high-voltage pulse generator, including a trigger generator (TG) and a pulse-forming line (PFL). The simulation has been carried out to estimate characteristics in the time domain, in addition to their output high-voltage amplitude. Experimental results compared with those obtained by simulation indicate that the delay of the output pulses of the TG and PFL, which are made by controlling the external triggering signal with respect to different charging voltages, is getting longer as the charging voltage is increasing, and their rise times are inversely proportional to the amplitude of the charging voltage.

• The Transactions of the Korean Institute of Power Electronics
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• v.20 no.3
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• pp.280-289
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• 2015

A high-efficiency full-bridge DC-DC converter with a current-doubler rectifier and an asymmetric pulse-width modulation is proposed. Through the asymmetric pulse-width modulation, the proposed converter achieves zero-voltage switching of power switches without the circulating currents. The proposed converter reduces the output current ripple through the current-doubler rectifier. A control strategy is suggested for the proposed converter to charge battery banks. A constant current and constant voltage charging is performed. The proposed converter achieved a higher efficiency compared with the conventional full-bridge DC-DC converter with a phase-shift modulation. The performance of the proposed converter is evaluated by the experimental results for a 1.0 kW prototype circuit.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.50 no.7
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• pp.329-333
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• 2001

The pulsed poser system has been widely used to many applications, such as E/P(Electrostatic Precipitator), DeNox/DeSOx power system, ozon generator, etc. A pulse energy efficiency for load depends on the rising time, peak value, pulse duration and impedance matching, etc. The pulse generator generally required for short pusle duration and high peak value was forced to consider its volume and economy. In this study, developing a compact pulse generator that applied for cascading method to be made of two pulse transformers, we compared cascading voltage with non cascading one by applying the pulse energy to load. Adopting cascading technique to pulse transformer, we found that average cascading voltage was about 60[%] of theoretical value. Maximum cascading ratio was calculated at 60 times compared with non cascading voltage.

• Journal of Power Electronics
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• v.7 no.2
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• pp.146-158
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• 2007

A multi-pulse GTO based voltage source converter (VSC) topology together with a fundamental frequency switching mode of gate control is a mature technology being widely used in static synchronous compensators (STATCOMs). The present practice in utility/industry is to employ a high number of pulses in the STATCOM, preferably a 48-pulse along with matching components of magnetics for dynamic reactive power compensation, voltage regulation, etc. in electrical networks. With an increase in the pulse order, need of power electronic devices and inter-facing magnetic apparatus increases multi-fold to achieve a desired operating performance. In this paper, a competitive topology with a fewer number of devices and reduced magnetics is evolved to develop an 18-pulse, 2-level $\pm$ 100MVAR STATCOM in which a GTO-VSC device is operated at fundamental frequency switching gate control. The inter-facing magnetics topology is conceptualized in two stages and with this harmonics distortion in the network is minimized to permissible IEEE-519 standard limits. This compensator is modeled, designed and simulated by a SimPowerSystems tool box in MATLAB platform and is tested for voltage regulation and power factor correction in power systems. The operating characteristics corresponding to steady state and dynamic operating conditions show an acceptable performance.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.06a
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• pp.11-12
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• 2009

In this paper, we propose a high voltage driver IC(HVIC) for LCD and PDP TV power supply. The proposed circuit is included novel a shoot-through protection and a pulse generation circuit for the high voltage driver IC. The proposed circuit has lower variation of dead time and pulse-width about a variation of a process and a supply voltage than a conventional circuit. Especially, the proposed circuit has more excellent pulse-width matching of set and reset signals than the conventional circuit. Also the proposed pulse generation circuit prevent from fault operations using a logic gate. Dead time and pulse-width of the proposed circuit are typical 250 ns, and its variation is maximum 170 ns(68 %) about a variation of a process and a supply voltage. The proposed circuit is designed using $1\;{\mu}m$ 650 V BCD process parameter, and a simulation is carried out using Spectre.

• Proceedings of the KIEE Conference
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• 2009.07a
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• pp.1023_1024
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• 2009

In this paper, a novel 10kV, 50A, 50kHz pulsed power supply based on IGBT stacks is proposed. Proposed scheme consists of series connected 12 IGBT to generate maximum 10kV output pulse and 10kW full bridge phase-shifted zero voltage switching converter to charge DC capacitor voltage. Each IGBTs are sustain the 830V of capacitor voltage at turn off interval. By turn on the each IGBT for the same time it gives the path for the series connection of charged capacitor. From above turn on and off procedure, high voltage repetitive pulse is applied to the load. The synchronization of gating signal is important of series operation of IGBTs. For gating signal synchronization, specially designed gate power circuit using full bridge inverter and pulse transformer is developed to generate IGBT gating signal.

• Proceedings of the KIPE Conference
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• 2018.07a
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• pp.45-47
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• 2018

This paper describes the 40kV solid state pulsed power supply for environmental applications. The output specifications of the pulsed power supply are 40kV, 300A, 3kHz, and average output power of 13kW. In order to generate a high voltage, a series stacking cell structure is used which is charged in parallel and discharged in series. Due to this structure, there is no dynamic voltage balancing problem as well as static voltage balancing problem for switches used in high voltage pulse power supplies. To verify this pulse power supply design, PSpice modeling was performed. Finally, experimental results with non-inductive resistive load and gas treatment reactor proved the reliability of the solid state pulsed power supply.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.13 no.4
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• pp.273-279
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• 2000

Electrical repair method which has replaced laser repair method can replace defective cell by redundancy’s in the redundancy scheme of conventional high density memory. This electrical repair circuit consists of the antifuse program/read/latch circuits, a clock generator a negative voltage generator a power-up pulse circuit a special address mux and etc. The measured program voltage of made antifuses was 7.2~7.5V and the resistance of programmed antifuses was below 500 Ω. The period of clock generator was about 30 ns. The output voltage of a negative voltage generator was about 4.3 V and the current capacity was maximum 825 $mutextrm{A}$. An antifuse was programmed using by the electric potential difference between supply-voltage (3.3 V) and output voltage generator. The output pulse width of a power-up pulse circuit was 30 ns ~ 1$mutextrm{s}$ with the variation of power-up time. The programmed antifuse resistance required below 44 ㏀ from the simulation of antifuse program/read/latch circuit. Therefore the electrical repair circuit behaved safely and the yield of high densitymemory will be increased by using the circuit.