• Title/Summary/Keyword: High-speed Data Processing

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The Flight Data Measurement System of Flying Golf Ball Using the High Speed CCD Camera (고속 카메라를 CCD 이용한 비행골프공의 데이터 측정 시스템)

  • Kim, Ki-Hyun;Jo, Jae-Ik;Yun, Chang-Ok;Park, Hyun-Woo;Joo, Woo-Suk;Lee, Dong-Hoon;Yun, Tae-Soo
    • 한국HCI학회:학술대회논문집
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    • 2009.02a
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    • pp.168-172
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    • 2009
  • Recently, while 3D sports game increases, the research that it recognizes the operation of the real user actively progresses. Most of all, the research about the golf is active. In this paper, the image acquiring in a high-speed CCD camera measures the flight data of the golf ball through the image processing. While photographing, the high-speed camera, using this system, exposes an image at regular intervals. And line scan camera checks whether the golf ball passed or not. After the location information of the calculated golf ball calculates a speed and a direction by using the physical formula, it applies the golf simulation.

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Development of Laser Vision Sensor with Multi-line for High Speed Lap Joint Welding

  • Sung, K.;Rhee, S.
    • International Journal of Korean Welding Society
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    • v.2 no.2
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    • pp.57-60
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    • 2002
  • Generally, the laser vision sensor makes it possible design a highly reliable and precise range sensor at a low cost. When the laser vision sensor is applied to lap joint welding, however. there are many limitations. Therefore, a specially-designed hardware system has to be used. However, if the multi-lines are used instead of a single line, multi-range data .:an be generated from one image. Even under a set condition of 30fps, the generated 2D range data increases depending on the number of lines used. In this study, a laser vision sensor with a multi-line pattern is developed with conventional CCD camera to carry out high speed seam tracking in lap joint welding.

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Implementation of Ethernet-Based High-Speed Data Communication for Multi-core DSP (멀티 코어 DSP를 위한 이더넷 기반 고속 데이터 통신 구현)

  • Nguyen, Dung Huy;Choi, Joon-Young
    • IEMEK Journal of Embedded Systems and Applications
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    • v.17 no.3
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    • pp.185-190
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    • 2022
  • We propose a high speed data communication method for motor drive systems with fast control cycle in order to collect state variables of motor control without degrading control performance. Ethernet is chosen for communication device, and multi-core DSP architecture is exploited for communication processing load distribution. The communication program including network protocol stack and motor control program are assigned to two separate cores, and data between two cores are exchanged using interrupt-based inter-process communication mechanism, which enables to achieve a high-speed communication performance without degrading the motor control performance. The performance of developed communication method is demonstrated by real experiments using TCP, UDP and Raw Socket protocols in an experimental setup consisting of TI's TMS320F28388D motor control card and MS Windows PC.

A Study on High Speed, High Precision Auto-alignment System Using Vision System (비전 시스템을 이용한 고속 고정도 자동 정렬장치 연구)

  • 홍준희;전경한
    • Proceedings of the IEEK Conference
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    • 1998.10a
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    • pp.457-460
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    • 1998
  • Recently, the research of the FPD(Flat Panel Display)which is substituted for CRT(Cathode Ray Tube) has been widely progressed. But most equipment that are used for production of FPD are expensive and we must import these equipment. Among these equipment, most important one is a auto-alignment system. In this paper, we present a high speed, high precision auto-alignment system, in which a PLD auto tuning algorithm, 1-dimensional CCD(Dcharge Coupled Device) camera, vision board, and vision data processing algorithm are included.

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N-Step Sliding Recursion Formula of Variance and Its Implementation

  • Yu, Lang;He, Gang;Mutahir, Ahmad Khwaja
    • Journal of Information Processing Systems
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    • v.16 no.4
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    • pp.832-844
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    • 2020
  • The degree of dispersion of a random variable can be described by the variance, which reflects the distance of the random variable from its mean. However, the time complexity of the traditional variance calculation algorithm is O(n), which results from full calculation of all samples. When the number of samples increases or on the occasion of high speed signal processing, algorithms with O(n) time complexity will cost huge amount of time and that may results in performance degradation of the whole system. A novel multi-step recursive algorithm for variance calculation of the time-varying data series with O(1) time complexity (constant time) is proposed in this paper. Numerical simulation and experiments of the algorithm is presented and the results demonstrate that the proposed multi-step recursive algorithm can effectively decrease computing time and hence significantly improve the variance calculation efficiency for time-varying data, which demonstrates the potential value for time-consumption data analysis or high speed signal processing.

High Speed Serial Network Environment on DCP (DCP 환경에서의 고속 Serial 네트웍 환경구현)

  • Park Chang-Won;Chung Ha-Joong;Jeon Ki-Man
    • 한국정보통신설비학회:학술대회논문집
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    • 2006.08a
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    • pp.87-90
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    • 2006
  • Nowadays, we can enjoy access to high speed network and advanced services of convergence between broadcasting and communication anywhere and anytime through a ubiquitous computing. So, now digital convergence devices come out constantly. These devices are required faster network environment for high speed data processing than before. In this paper, we describe the design of InfiniBnad network adapter, which is included two FPGA chipsets. When this adapter is installed to Digital Convergence Platform (DCP) network performance will be improved. The adapter includes 12channel serial ports for external communication and internally, uses PCI-Express bus. We have finished the test of high speed serial based network adapter through composing complete InfiniBand network and applied fabric management software. So, we have verified that it can be applied on DCP environment.

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Locally weighted linear regression prefetching method for hybrid memory system (하이브리드 메모리 시스템의 지역 가중 선형회귀 프리페치 방법)

  • Tang, Qian;Kim, Jeong-Geun;Kim, Shin-Dug
    • Annual Conference of KIPS
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    • 2020.11a
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    • pp.12-15
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    • 2020
  • Data access characteristics can directly affect the efficiency of the system execution. This research is to design an accurate predictor by using historical memory access information, where highly accessible data can be migrated from low-speed storage (SSD/HHD) to high-speed memory (Memory/CPU Cache) in advance, thereby reducing data access latency and further improving overall performance. For this goal, we design a locally weighted linear regression prefetch scheme to cope with irregular access patterns in large graph processing applications for a DARM-PCM hybrid memory structure. By analyzing the testing result, the appropriate structural parameters can be selected, which greatly improves the cache prefetching performance, resulting in overall performance improvement.

Low-Cost CRC Scheme by Using DBI(Data Bus Inversion) for High Speed Semiconductor Memory (고속반도체 메모리를 위한 DBI(Data Bus Inversion)를 이용한 저비용 CRC(Cyclic Redundancy Check)방식)

  • Lee, Joong-Ho
    • Journal of IKEEE
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    • v.19 no.3
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    • pp.288-294
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    • 2015
  • CRC function has been built into the high-speed semiconductor memory device in order to increase the reliability of data for high-speed operation. Also, DBI function is adopted to improve of data transmission speed. Conventional CRC(ATM-8 HEC code) method has a significant amounts of area-overhead(~XOR 700 gates), and processing time(6 stage XOR) is large. Therefore it leads to a considerable burden on the timing margin at the time of reading and writing of the low power memory devices for CRC calculations. In this paper, we propose a CRC method for low cost and high speed memory, which was improved 92% for area-overhead. For low-cost implementation of the CRC scheme by the DBI function it was supplemented by data bit error detection rate. And analyzing the error detection rate were compared with conventional CRC method.

Hadoop Based Wavelet Histogram for Big Data in Cloud

  • Kim, Jeong-Joon
    • Journal of Information Processing Systems
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    • v.13 no.4
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    • pp.668-676
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    • 2017
  • Recently, the importance of big data has been emphasized with the development of smartphone, web/SNS. As a result, MapReduce, which can efficiently process big data, is receiving worldwide attention because of its excellent scalability and stability. Since big data has a large amount, fast creation speed, and various properties, it is more efficient to process big data summary information than big data itself. Wavelet histogram, which is a typical data summary information generation technique, can generate optimal data summary information that does not cause loss of information of original data. Therefore, a system applying a wavelet histogram generation technique based on MapReduce has been actively studied. However, existing research has a disadvantage in that the generation speed is slow because the wavelet histogram is generated through one or more MapReduce Jobs. And there is a high possibility that the error of the data restored by the wavelet histogram becomes large. However, since the wavelet histogram generation system based on the MapReduce developed in this paper generates the wavelet histogram through one MapReduce Job, the generation speed can be greatly increased. In addition, since the wavelet histogram is generated by adjusting the error boundary specified by the user, the error of the restored data can be adjusted from the wavelet histogram. Finally, we verified the efficiency of the wavelet histogram generation system developed in this paper through performance evaluation.

A Prediction-Based Data Read Ahead Policy using Decision Tree for improving the performance of NAND flash memory based storage devices (낸드 플래시 메모리 기반 저장 장치의 성능 향상을 위해 결정트리를 이용한 예측 기반 데이터 미리 읽기 정책)

  • Lee, Hyun-Seob
    • Journal of Internet of Things and Convergence
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    • v.8 no.4
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    • pp.9-15
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    • 2022
  • NAND flash memory is used as a medium for various storage devices due to its high data processing speed with low power consumption. However, since the read processing speed of data is about 10 times faster than the write processing speed, various studies are being conducted to improve the speed difference. In particular, flash dedicated buffer management policies have been studied to improve write speed. However, SSD(solid state disks), which has recently been used for various purposes, is more vulnerable to read performance than write performance. In this paper, we find out why read performance is slower than write performance in SSD composed of NAND flash memory and study buffer management policies to improve it. The buffer management policy proposed in this paper proposes a method of improving the speed of a flash-based storage device by analyzing the pattern of read data and applying a policy of pre-reading data to be requested in the future from NAND flash memory. It also proves the effectiveness of the read-ahead policy through simulation.